Artificial Intelligence applications are a major driver in the hardware development of smart systems. An unprecedented number of proposals for better neuromorphic and neuro-inspired hardware architectures have been suggested, ranging from extremely large and high-performance “wafer-scale” circuits to emerging nano-electronic device-based circuits for storing and manipulating information. The proposed workshop looks at neuromorphic hardware from a different perspective: How to provide sufficient AI and ML performance in applications with extremely limited resources like area, power and energy. Among such approaches, stochastic computing promises outstanding area- and power-efficiency because it offers very compact and reliable realizations of the basic arithmetic operations found in a broad range of neuromorphic applications. The workshop SCONA will bring together researchers working on stochastic computing and resource-limited neuromorphic architectures.
The workshop invites submissions on, but not limited to, the following topics:
- Stochastic primitives for neural networks and other neuromorphic architectures
- Neuromorphic hardware architectures based on stochastic computing
- Methods for design, synthesis, analysis, and verification of stochastic circuits
- Stochastic circuits and architectures based on emerging technologies
- Applications of neuromorphic stochastic architectures and case studies
The workshop will be co-located with the DATE 2020 conference. At least one author of each accepted paper is expected to register using DATE’s regular registration system. DATE workshops have no formal proceedings but SCONA will prepare an informal electronic proceedings distributed to the workshop participants.