W02 4th Workshop on Nano Security: From Nano-Electronics to Secure Systems
Today’s societies critically depend on electronic systems. Security of such systems are facing completely new challenges due to the ongoing transition to radically new types of nano-electronic devices, such as memristors, spintronics, or carbon nanotubes. The use of such emerging nano-technologies is inevitable to address the essential needs related to energy efficiency, computing power and performance. Therefore, the entire industry are switching to emerging nano-electronics alongside scaled CMOS technologies in heterogeneous integrated systems. These technologies come with new properties and also facilitate the development of radically different computer architectures.
The fourth edition of the NanoSec workshop will bring together researchers from hardware-oriented security and from emerging hardware technology. It will explore the potential of new technologies and architectures to provide new opportunities for achieving security targets, but it will also raise questions about their vulnerabilities to new types of hardware-oriented attacks. The workshop is based on a Priority Program https://spp-nanosecurity.uni-stuttgart.de/ funded since 2019 by the German DFG, and will be open to members and non-members of that Priority Program alike.
This year, the workshop will feature a Special Session on Secure Compute-in-Memory Architectures, organized by Prof. Mahdi Fazeli (Halmstad University) and Prof. Ahmad Patooghy (North Caroline A&T University)
Organisers: Ilia Polian, Nan Du, Yunsi Fei, Shahar Kvatinsky and Fareena Saqib (ilia [dot] polian
informatik [dot] uni-stuttgart [dot] de) – Germany
Keynote
Intelligent & Perceptive Attack Counteraction for Next-Generation Secure Chips – From Sensing to Learning
Massimo Alioto (ECE – National University of Singapore)
Session 1: Modeling and Simulation of Hardware Security Threats
Integrating Optical Probing Security Evaluation Framework Into ASIC Design Flow
Sajjad Parvin (U Bremen), Frank Sill Torres (DLR), Rolf Drechsler (U Bremen an DFKI)
Limitations of Architectural Simulation for Security: Why Transient-Execution Countermeasures Must Be Designed and Evaluated on the RTL
Tobias Jauch, Philipp Schmitz, Alex Wezel, Simón Blanko Ortiz, Mohammad Rahmani Fadiheh, Dominik Stoffel, Wolfgang Kunz (RPTU Kaiserslautern-Landau)
Modeling of Tamper Resistance to Correlative Electromagnetic Analysis for Voltage-scaled Circuits
Yusuke Matsubayashi, Kazuki Minamiguchi, Hiroki Nishikawa, Yoshihiro Midoh, Noriyuki Miura and Jun Shiomi (U Osaka)
Coffee Break and Posters
EMBOSOM: Embedded Software Security into Modern Emerging Hardware Paradigms
Rolf Drechsler (U Bremen), Tim Güneysu and Pascal Sasdrich (RU Bochum), Christoph Lüth (U Bremen)
HaSPro: Verifiable Hardware Security for Out-of-Order Processors
Thomas Eisenbarth (U Lübeck), Wolfgang Kunz (TU Kaiserslautern)
MemCrypto: Towards Secure Electroforming-free Memristive Cryptographic Implementations
Nan Du (FSU Jena), Ilia Polian (U Stuttgart)
NanoSec2: Nanomaterial-based platform electronics for PUF circuits with extended entropy sources
Sascha Herrmann (TU Chemnitz), Stefan Katzenbeisser (U Passau), Elif Kavun (U Passau)
OnE-Secure: Securing State-of-the-Art Chips Against High-Resolution Contactless Optical and Electron-Beam Probing Attacks
Sebastian Brand (FhG IMWS), Rolf Drechsler (U Bremen), Jean-Pierre Seifert TU Berlin), Frank Sill Torres (DLR)
RAINCOAT: Randomization in Secure Nano-Scale Microarchitectures 2
Lucas Davi (U Duisburg-Essen), Tim Güneysu (RU Bochum)
SecuReFET: Secure Circuits through Inherent Reconfigurable FET
Akash Kumar (TU Dresden), Thomas Mikolajick (NaMLab GmbH)
SeMSiNN: Secure Mixed-SIgnal Neural Networks
Maurits Ortmanns (U Ulm), Ilia Polian (U Stuttgart)
SSIMA: Scalable Side-Channel Immune Micro-Architecture
Amir Moradi (TU Darmstadt)
STAMPS-PLUS: Exploration of an integrated Strain-based TAMPer Sensor for Puf and trng concepts with best-in-class Leakage resilience and robUStness
Ralf Brederlow (TU Munich), Matthias Hiller (FhG AISEC), Michael Pehl (TU Munich)
Special Session on Secure Compute-in-Memory Architectures
Security Aspects of Computing-in-Memory Architectures in AI Era
Ahmad Patooghy (North Caroline A&T U), Mahdi Fazeli (Halmstad University)
A Case Study: Secure Reconfigurable FET-Based SRAM Architecture for In-Memory Computing
Farah Naz Syed (RU Bochum), Peng Chong, Juan Martinez, Stefan Slesazeck, Jens Trommer, Thomas Mikolajick (NamLab gGmbH), Akash Kumar (RU Bochum)
Session 2: Physical Attack Protections
Preventing Distinguishability between Multiplication and Squaring Operations
Alkistis Aikaterini Sigourou (Leibniz IHP), Zoya Dyka (Leibniz IHP and BTU Cottbus-Senftenberg), Peter Langendoerfer (BTU Cottbus-Senftenberg), Ievgen Kabin (Leibniz IHP)
Logic Locking with Lightweight Cryptography
Levent Aksoy (TU Tallinn), Muhammad Sohaib Munir (TU Tallinn), Sedat Akleylek (U Tartu)
Lifecycle Protecting Integrated Circuits Using Physical Unclonable Functions
Michael Pehl, Carl Riehm, Tim Music (TU Munich), Valentin Huber, Matthias Hiller (FhG AISEC), Ralf Brederlow (TU Munich)
Session 3: Emerging Technologies and Security
Exploiting Ultra-Low Voltage RFETs for Dynamic Circuit Obfuscation in Embedded Security
Giulio Galderisi, Yuxuan He (NaMLab gGmbH), Aniruddh Holemadlu (RU Bochum), Juan Martinez, Thomas Mikolajick (NaMLab gGmbH), Akash Kumar (RU Bochum), Jens Trommer NaMLab gGmbH
Dynamic Key Change Scheme for Protecting Arbitrary Data Communication in a Multi-Die IC
Zheng-Hao Wang, Shi-Yu Huang (NTHU Taiwan), Chi-Kang Chen (TESDA)
Fabrication, Characterisation and Evaluation of Ternary Carbon Nanotube-based PUFs Implemented in Crossbar Structures
Martin Schmid (U Passau), Simon Böttger, Martin Ernst, Martin Hartmann, Sascha Hermann (TU Chemnitz), Elif Bilge Kavun (TU Dresden) Stefan Katzenbeisser (U Passau)