W02 Computation-In-Memory (CIM): from Device to Applications
Aim of the Conference: All issues with which the architectures and technologies are face today have led to the slowdown of the traditional device scaling. In order for computing systems to continue deliver sustainable benefits for the foreseeable future, alternative computing architectures and notions have to be explored in the light of emerging new device technologies. This workshop aims at providing a forum to discuss Computation-in-Memory (as an alternative architecture) in the light of emerging non-volatile devices (such as RRAM, PCM and STT-MRAM), and its potential applications. It also aims at reinforcing the CIM community and at offering a holistic vision of this emerging computing paradigm to the electronic design, automation and test communities.
The workshop covers all aspects of CIM based on non-volatile devices including (but not limited to):
- Device and technology: physics and modeling, device technologies, device characterization.
- Novel logic and circuit design concepts using NV devices: Boolean logic, threshold logic, arithmetic circuits, multi-level based logic, memories, PUF technology, TRNG design.
- System architectures and new computing paradigms: resistive computing, neuro-inspired computing, novel architectures and CMOS integration, cellular automata and array computing.
- Applications exploiting NV devices: signal processing, chaos and complex networks, sensors applications, AI applications.
- Automation and CAD tools: mapping tools, compilers, logic synthesis tools, design space exploration tools.
- Test and Reliability: test and reliability solutions for circuits and architectures.
The workshop will be co-located with the DATE 2020 conference. At least one author of each accepted paper is expected to register to the workshop using DATE’s regular registration system.