IP1_2 Interactive Presentations
Date: Tuesday, 02 February 2021
Time: 09:50 - 10:20 CET
Virtual Conference Room: https://virtual21.date-conference.com/meetings/virtual/SzLa3CdcHoLXXd9TB
Interactive Presentations run simultaneously during a 30-minute slot. Additionally, each IP paper is briefly introduced in a one-minute presentation in a corresponding regular session
|IP1_2.1||OPERATING BEYOND FPGA TOOL LIMITATIONS: NERVOUS SYSTEMS FOR EMBEDDED RUNTIME MANAGEMENT
Martin Trefzer, University of York, GB
Matthew Rowlings, Martin Albrecht Trefzer and Andy Tyrrell, University of York, GB
Deep submicron fabrication issues throttle VLSI designs with pessimistic design constraints required to avoid failure of devices in the field. This imposes overly-conservative design approaches, including worst-case corners and speed-grade device binning, resulting in systems performing far below their maximum possible performance. An alternative is to monitor a device's operating state in the field and manage key parameters autonomously at runtime. In a modern SoC consisting of millions of transistors there are a huge number of potential monitoring and actuation points. This makes the autonomous management task difficult when using centralised intelligence for parameter decisions and is inherently non-scalable. An organism's decentralised control, the Nervous System, manages high degrees of scalability. Nervous Systems use a hierarchy of neural circuitry to: a) integrate sensory data, b) manage local feedback paths between sensory inputs (nerve cells) and local actuators (muscle cells), c) combine many integrated local sensory pathways together to form higher-level decisions that affect many actuators spread across the organism. This model maps well to VLSI designs: low-level sensors are formed of small sensory circuits (timing fault detectors, ring oscillators), low-level actuators map to configurable design elements (voltage islands, clock-tree delay elements) and high-level decision units manage global clock frequencies and device voltage rails which affect the whole chip. This paper motivates the adoption of a Nervous System-inspired approach. We explore the problem of device binning by presenting experimental results characterising an Artix-7 FPGA design. Our test circuit is overclocked by twice the maximum design tool frequency and run at 50 degrees Celsius above its maximum operating temperature without error. Our Configurable Intelligence Array is then introduced as a low-overhead intelligence platform, ideal for implementing nervous system signal pathways. This is used for a prototype neural circuit that closes the loop between a timing-fault detector and a programmable PLL.
|IP1_2.2||ADAPTIVE-LEARNING BASED BUILDING LOAD PREDICTION FOR MICROGRID ECONOMIC DISPATCH
Rumia Masburah, Student, IN
Rumia Masburah1, Rajib Lochan Jana2, Ainuddin Khan2, Shichao Xu3, Shuyue Lan3, Soumyajit Dey1 and Qi Zhu3
1Indian Institute of Technology Kharagpur, IN; 2Indian institute of Technology Kharagpur, IN; 3Northwestern University, US
Given that building loads consume roughly 40% ofthe energy produced in developed countries, smart buildingswith local renewable resources offer a viable alternative towardsachieving a greener future. Building temperature control strategiestypically employ detailed physical models capturing buildingthermal dynamics. Creating such models require a significantamount of time, information and finesse. Even then, due tounknown building parameters and related inaccuracies, futurepower demands by the building loads are difficult to estimate. Thiscreates unique challenges in the domain of microgrid economicpower dispatch for satisfying building power demands throughefficient control and scheduling of renewable and non-renewablelocal resources in conjunction with supply from the main grid. In this work, we estimate the real-time uncertainties in buildingloads using Gaussian Process (GP) learning and establish theeffectiveness of run time model correction in the context ofmicrogrid economic dispatch. Our system architecture employsa Deep Reinforcement Learning (DRL) framework that adap-tively triggers the GP model learning and updating phase forconsistently providing accurate power demand prediction of thebuilding load. We employ a Model Predictive Control (MPC)based microgrid power dispatch scheme enabled with our demandprediction framework and co-simulate it with EnergyPlus buildingload simulator to establish the efficacy of our approach.