Date: Tuesday 15 March 2016
Time: 17:00 - 18:30
Location / Room: Konferenz 5

Chair:
Nuno Horta, Instituto de Telecomunicacoes, PT

Co-Chair:
Jaijeet Roychowdhury, UC Berkeley, US

This session contains papers presenting surrogate models for RF inductors, compact models for bipolar transistor and nonlinear models for low power DC-DC converters.

Time	Label	Presentation Title Authors
17:00	4.7.1	ACCURATE SYNTHESIS OF INTEGRATED RF PASSIVE COMPONENTS USING SURROGATE MODELS Speaker: Fabio Passos, CSIC, Universidad de Sevilla, ES Authors: F. Passos, R. González-Echeverría, E. Roca, R. Castro-López and F. V. Fernández, CSIC, Universidad de Sevilla, ES Abstract Passive components play a key role on the design of RF CMOS integrated circuits. Their synthesis, however, is still an unsolved problem due to the lack of accurate analytical models that can replace the computationally expensive electromagnetic simulations (EM). Both, physical-based and surrogate models have been reported that fail to accurately model the complete design space of inductors. Surrogate-assisted optimization techniques, where coarse models are locally enhanced during the inductor synthesis process by using new EM-simulated points to update the model, have been proposed, but either the efficiency is dramatically decreased due to the online EM simulations or the optimization may converge to suboptimal regions. In this paper, we present a new surrogate model, valid in the entire design space with less than 1% error when compared with EM simulations. This model can be generated offline, and, when embedded within an optimization algorithm, allows the synthesis of integrated inductors with high accuracy and high efficiency, reducing the synthesis time in three orders of magnitude. Download Paper (PDF; Only available from the DATE venue WiFi)
17:30	4.7.2	IMPLEMENTATION AND QUALITY TESTING FOR COMPACT MODELS IMPLEMENTED IN VERILOG-A Speaker: Anindya Mukherjee, Technische Universität Dresden, DE Authors: Anindya Mukherjee1, Andreas Pawlak1, Michael Schröter1, Didier Celi2 and Zoltan Huszka3 1Technische Universität Dresden, DE; 2ST, FR; 3AMS, AG, HU Abstract An overview on the implementation of new physical effects into the compact heterojunction bipolar transistor model HICUM/L2 is presented along with a description of quality testing procedures before its public release for production circuit design in commercial simulators. Related topics such as potential measures for model run time improvements and failures are also discussed. Significant differences in run time for different commercial circuit simulators reflect their different approaches towards compact model implementation. Download Paper (PDF; Only available from the DATE venue WiFi)
18:00	4.7.3	MULTI-HARMONIC NONLINEAR MODELING OF LOW-POWER PWM DC-DC CONVERTERS OPERATING IN CCM AND DCM Speaker: Dani Tannir, Lebanese American University, LB Authors: Ya Wang1, Di Gao1, Dani Tannir2 and Peng Li1 1Texas A&M University, US; 2Lebanese American University, LB Abstract DC-DC converters form an essential component of modern low-power integrated circuits. This paper presents a novel nonlinear modeling technique for pulse-width modulated (PWM) DC-DC converters for low-power applications. Our enhanced model not only predicts the dc response, but also captures harmonics of arbitrary degrees. The proposed full-order model retains the inductor current as a state variable and accurately captures the circuit dynamics even in the transient state. Furthermore, by continuously monitoring state variables, our model seamlessly transitions between continuous conduction mode (CCM) and discontinuous conduction mode (DCM), which often occurs in low-power applications while also accounting for the non-idealities of the circuit devices. The proposed model, when tested with a system decoupling technique, obtains up to 10X runtime speedups over transistor-level simulations with a maximum output voltage error that never exceeds 4%. Download Paper (PDF; Only available from the DATE venue WiFi)
18:30		End of session