DATE Save the Date 17 to 19 April 2023


Dear DATE community,

We, the DATE Sponsors Committee (DSC) and the DATE Executive Committee (DEC), are deeply shocked and saddened by the tragedy currently unfolding in Ukraine, and we would like to express our full solidarity with all the people and families affected by the war.

Our thoughts also go out to everyone in Ukraine and Russia, whether they are directly or indirectly affected by the events, and we extend our deep sympathy.

We condemn Russia’s military action in Ukraine, which violates international law. And we call on the different governments to take immediate action to protect everyone in that country, particularly including its civilian population and people affiliated with its universities.

Now more than ever, our DATE community must promote our societal values (justice, freedom, respect, community, and responsibility) and confront this situation collectively and peacefully to end this nonsense war.

DATE Sponsors and Executive Committees.


Kindly note that all times on the virtual conference platform are displayed in the user's time zone.

The time zone for all times mentioned at the DATE website is CET – Central Europe Time (UTC+1).

DATE 2022 Awards

The awards have been announced in the closing session on Wednesday, 23 March 2022. Below is the video of the closing session.

 

EDAA Outstanding Dissertations Award 2022

Topic1:

Thesis: “High-level Synthesis of Dynamically Scheduled Circuits

Lana Josipovic, Ph.D., EPFL, CH

Advisor: Prof. Paolo Ienne

Topic 3:

Thesis: “Design for Manufacturability and Reliability through Learning and Optimization

Wei Ye, PhD., University of Texas at Austin, US

Advisor: Prof. David Z. Pan

Topic 4:

Thesis: “Revisiting Fault Analysis of Block Ciphers: Attacks, Defenses, and Vulnerability Assessment Frameworks

Sayandeep Saha, Ph.D., Indian Institute of Technology, Kharagpur, IN

Advisor: Prof. Debdeep Mukhopadhyay and Prof. Pallab Dasgupta

DATE Best IP Award

XST: A Crossbar Column-Wise Sparse Training For Efficient Continual Learning

Fan Zhang, Li Yang, Jian Meng, Jae-sun Seo, Yu Cao, Deliang Fan, Arizona State University, US

DATE Best Paper Awards

Each year the Design, Automation and Test in Europe Conference presents awards to the authors of the best papers. The selection is performed by the award committee composed of the Track Chairs, Lejla Batina, Theocharis Theocharides, Ilia Polian and Liliana Cucu and the following members: Steve Dai, Julien Forget Stefano Di Carlo, Elena Gnani, Sebastien Le Beux, Romain Lemaire, Hai Li, Nele Mentens, Maria Michael, Katell Morin-Allory, Gianluca Palermo, Ioannis Papaefstathiou, Christian Pilato, Davide Quaglia, Abbas Rahimi, Francesco Regazzoni, Ahmed Rezine, Rosa Rodrigues, Mohamed Sabri, Peh Li Shiuan, Lukas Sekanina, Olivier Sentieys, Johanna Sepulveda, Nima Taheri Nejad, Marian Verhelst, Arnaud Virazel, Pascal Vivet.

The DATE 2022 best papers are:

D Track

FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler

Siting Liu1,2, Peiyu Liao1,2, Rui Zhang3, Zhitang Chen4, Wenlong Lv4, Yibo Lin1, Bei Yu2

1 Peking University, 2 The Chinese University of Hong Kong, 3 HiSilicon Technologies Co., 4 Huawei Noah's Ark Lab

A Track

Algorithm-Hardware Co-Design for Efficient Brain-Inspired Hyperdimensional Learning on Edge

Yang Ni1, Yeseong Kim2, Tajana Rosing3, Mohsen Imani1

1 University of California Irvine, 2 DGIST Republic of Korea, 3 University of California San Diego

T Track

Self-Terminated Write of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing

Zongwu Wang, Zhezhi He, Rui Yang, Shiquan Fan, Jie Lin, Fangxin Liu, Yueyang Jia, Chenxi Yuan, Qidong Tang, Li Jiang

Shanghai Jiao Tong University, China

E Track

Efficient Global Robustness Certification of Neural Networks via Interleaving Twin-Network Encoding

Zhilu Wang1, Chao Huang2, Qi Zhu1

1 Northwestern University, 2 University of Liverpool, Northwestern University

Best Paper Award Nominations

D Track

PowerGear: Early-Stage Power Estimation in FPGA HLS via Heterogeneous Edge-Centric GNNs

Zhe, Lin, Peng Cheng Laboratory

Zike, Yuan, The University of Auckland

Jieru, Zhao, Shanghai Jiao Tong University

Wei, Zhang, Hong Kong University of Science and Technology

Hui, Wang, Peng Cheng Laboratory

Yonghong, Tian, Peking University & Peng Cheng Laboratory

PIMProf: An Automated Program Profiler for Processing-in-Memory Offloading Decisions

Yizhou Wei, University of Virginia

Minxuan Zhou, University of California, San Diego

Sihang Liu, University of Virginia

Korakit Seemakhupt, University of Virginia

Tajana Rosing, University of California, San Diego

Samira Khan, University of Virginia

Full-credit Flow Control: A Novel Technique to Implement Deadlock-free Adaptive Routing

Yi Dai, National University of Defense Technology, China

Kai Lu, National University of Defense Technology, China

Sheng Ma, National University of Defense Technology, China

Junsheng Chang, National University of Defense Technology, China

FastGR: Global Routing on CPU-GPU with Heterogeneous Task Graph Scheduler

Siting Liu, The Chinese University of Hong Kong

Peiyu Liao, The Chinese University of Hong Kong

Rui Zhang, HiSilicon Technologies Co., Ltd. Shenzhen

Zhitang Chen, Huawei Noah's Ark Lab

Wenlong Lv, Huawei Noah's Ark Lab

Yibo Lin, Peking University

Bei Yu, The Chinese University of Hong Kong

CoreMemDTM: Integrated Processor Core and 3D Memory Dynamic Thermal Management for Improved Performance

Lokesh Siddhu, Indian Institute of Technology, Delhi

Rajesh Kedia, Indian Institute of Technology Delhi,

Preeti Ranjan Panda, Indian Institute of Technology Delhi,

MemPool-3D: Boosting Performance and Efficiency of Shared-L1 Memory Many-Core Clusters with 3D Integration

Matheus Cavalcante, ETH Zurich

Anthony Agnesina, Georgia Tech

Samuel Riedel, ETH Zurich

Moritz Brunion, University of Bremen

Alberto Garcia-Ortiz, University of Bremen

Dragomir Milojevic, IMEC

Francky Catthoor, IMEC

Sung Kyu, Lim, Georgia Tech

Luca Benini, Università di Bologna and ETH Zurich, Italy

AdaFlow: A Framework for Adaptive Dataflow CNN Acceleration on FPGAs

Guilherme Korol, Universidade Federal do Rio Grande do Sul

Michael Jordan, Universidade Federal do Rio Grande do Sul

Mateus Beck Rutzig, UFSM

Antonio Carlos Schneider Beck, Universidade Federal do Rio Grande do Sul

Cross-Layer Approximation For Printed Machine Learning Circuits

Giorgos Armeniakos, National Technichal University of Athens

Georgios Zervakis, Karlsruhe Institute of Technology

Dimitrios Soudris, National Technichal University of Athens

Mehdi Tahoori, Karlsruhe Institute of Technology

Joerg Henkel, Karlsruhe Institute of Technology

BMC+Fuzz : Efficient and Effective Test Generation

Ravindra Metta, TCS, IN

Raveendra Medicherla, TCS, IN

Samarjit Chakraborty, UNC Chapel Hill, US

A Track

Prefender: Prefetching Defender against Cache Side Channel Attacks as A Pretender

Luyi Li, Nanjing University

Jiayi Huang, University of California, Santa Barbara

Lang Feng, Nanjing University

Zhongfeng Wang, Nanjing University

Algorithm-Hardware Co-Design for Efficient Brain-Inspired Hyperdimensional Learning on Edge

Yang Ni, University of California, Irvine

Yeseong Kim, DGIST, Republic of Korea

Tajana Rosing, University of California San Diego

Mohsen Imani, University of California Irvine

Bioformers: Embedding Transformers for Ultra-Low Power sEMG-based Gesture Recognition

Alessio Burrello, Università di Bologna

Francesco Bianco Morghet, Politecnico di Torino

Moritz Scherer, ETH Zurich

Simone Benatti, University of Bologna, Italy

Luca, Benini, Università di Bologna and ETH Zurich

Enrico Macii, Politecnico di Torino

Massimo Poncino, Politecnico di Torino

Daniele Jahier Pagliari, Politecnico di Torino

Adaptive Droplet Routing for MEDA Biochips via Deep Reinforcement Learning

Mahmoud Elfar, Duke University

Tung-Che Liang, Duke University

Krishnendu Chakrabarty, Duke University

Miroslav Pajic, Duke University

Accurate Probabilistic Miss Ratio Curve Approximation for Adaptive Cache Allocation in Block Storage Systems

Rongshang Li, University of Sydney

Yingtian Tang, University of Pennsylvania

Qiquan, Shi, Huawei Noah's Ark Lab

Hui Mao, Huawei Noah's Ark Lab

Lei Chen, Huawei Noah's Ark Lab

Jikun Jin, Huawei Storage Product Line

Peng Lu, Huawei Storage Product Line

Zhuo Cheng, Huawei Storage Product Line

T Track

ADD-based Spectral Analysis of Probing Security

Maria Chiara Molteni, Universita' degli Studi di Milano

Vittorio Zaccaria, Politecnico di Milano

Valentina Ciriani, Universita' degli Studi di Milano

Are Analytical Techniques Worthwhile for Analog IC Placement?

Yishuang Lin, Texas A&M University

Yaguang Li, Texas A&M University

Donghao Fang, Texas A&M University

Meghna Madhusudan, University of Minnesota

Sachin S. Sapatnekar, University of Minnesota

Ramesh Harjani, University of Minnesota

Jiang Hu, Texas A&M University

A Cross-Platform Cache Timing Attack Framework via Deep Learning

Ruyi Ding, Northeastern University

Ziyue Zhang, Northeastern University

Xiang Zhang, Northeastern University

Cheng Gongye, Northeastern University

Yunsi Fei, Northeastern University

A. Adam Ding, Northeastern University

Self-Terminated Write of Multi-Level Cell ReRAM for Efficient Neuromorphic Computing

Zongwu Wang, Shanghai Jiaotong University

Zhezhi He, Shanghai Jiao Tong University

Rui Yang, Shanghai Jiaotong University

Shiquan Fan, Xi’an Jiaotong University

Jie Lin, Shanghai Jiaotong University

Fangxin Liu, Shanghai Jiaotong University

Yueyang Jia, Shanghai Jiaotong University

Chenxi Yuan, Xi’an Jiaotong University

Qidong Tang, Shanghai JiaoTong University

Li Jiang, Shanghai Jiao Tong University

Do Temperature and Humidity Exposures Hurt or Benefit Your SSDs?

Adnan Maruf, Florida International University

Sashri Brahmakshatriya, Florida International University

Baolin Li, Northeastern University

Devesh Tiwari, Northeastern University

Gang Quan, Florida International University

Janki Bhimani, Florida International University

E Track

DTQAtten: Leveraging Dynamic Token-based Quantization for Efficient Attention Architecture

Tao Yang, Shanghai Jiao Tong University

Dongyue Li, Shanghai Jiaotong University

Zhuoran Song, Shanghai Jiao Tong University

Yilong Zhao, Shanghai Jiao Tong University

Fangxin Liu, Shanghai Jiaotong University

Zongwu Wang, Shanghai Jiaotong University

Zhezhi He, Shanghai Jiao Tong University

Li Jiang, Shanghai Jiao Tong University

MU-RMW: MiNIMIZING Unnecessary RMW Operations in the Embedded Flash with SMR Disk

Chenlin Ma, Shenzhen University

Zhuokai Zhou, Shenzhen University

Yingping Wang, Shenzhen University

Yi Wang, Shenzhen University

Rui Mao, Shenzhen University

GraphHD: Efficient graph classification using hyperdimensional computing

Igor Nunes, University of California, Irvine

Mike Heddes, University of California, Irvine

Tony Givargis, University of California, Irvine

Alex Nicolau, University of California, Irvine

Alex Veidenbaum, University of California, Irvine

AnaCoNGA: Analytical HW-CNN Co-design using Nested Genetic Algorithms

Nael Fasfous, Technical University of Munich

Manoj Rohit, Vemparala, BMW AG

Alexander Frickenstein, BMW Group

Emanuele Valpreda, Politecnico di Torino

Driton Salihu, Technical University of Munich

Julian Hofer, Karlsruhe Institute of Technology

Anmol Singh, BMW AG

Naveen-Shankar Nagaraja, BMW AG

Hans-Joerg Voegel, BMW AG

Nguyen Anh Vu Doan, Technical University of Munich

Maurizio Martina, Politecnico di Torino

Juergen Becker, Karlsruhe Institute of Technology - ITIV

Walter Stechele, TUM

Efficient Global Robustness Certification of Neural Networks via Interleaving Twin-Network Encoding

Zhilu Wang, Northwestern University

Chao Huang, University of Liverpool, Northwestern University

Qi Zhu, Northwestern University

Cache-Aware Schedulability Analysis of PREM Compliant Tasks

Syed Aftab Rashid, CISTER, ISEP Polytechnic Institute of Porto

Muhammad Ali Awan, CISTER, ISEP Polytechnic Institute of Porto

Pedro Souto, Faculty of Engineering of the University of Porto

Konstantinos Bletsas, CISTER, ISEP Polytechnic Institute of Porto

Eduardo Tovar, CISTER, ISEP Polytechnic Institute of Porto

ACM SIGDA/CEDA/EDAA PhD Forum Prize

Ultra-Fast Temperature Estimation Methods For Architecture-Level Thermal Modeling

Hameedah Sultan, Indian Institute of Technology Dehli, IN

Dependable Reconfigurable Scan Networks

Natalia Lylina, University of Stuttgart, DE

DATE Fellow Award

Franco Fummi, Università di Verona, IT

IEEE CEDA Service Award

Franco Fummi, Università di Verona, IT

IEEE CS TTTC Outstanding Contribution Award

Franco Fummi, Università di Verona, IT

Cristiana Bolchini, Politecnico di Milano, IT

 

These awards have been announced in the opening session on Monday, 14 March 2022. Below is the video of the opening session.