EDAA Achievement Award 2026

Krishnendu Chakrabarty, Arizona State University, US

in recognition of outstanding contributions to EDA and its community.

https://date26.date-conference.com/edaa-achievement-award-2026-goes-kri…

IEEE CEDA Outstanding Service Recognition Award

Aida Todri-Sanial, Eindhoven University of Technology, NL

for outstanding contributions to DATE as General Chair of DATE 2025

IEEE CEDA Distinguished Service Award

David Atienza, EPFL, CH

for distinguished service to the EDA community and the IEEE Council on EDA

 

IEEE CS TTTC Outstanding Contribution Award

Valeria Bertacco, University of Michigan, US

for outstanding contributions to DATE as General Chair of DATE 2026

 

IEEE CS TTTC Outstanding Contribution Award

Wolfgang Müller, Paderborn University, DE

for exceptional contributions to DATE

 

Young People Programme – PhD Forum Best Poster Award

Side-Channel Awareness in Neural Network FPGA Accelerators: Security Threats and Opportunities for Functional Safety

Vincent Meyers, Karlsruhe Institute of Technology, DE

Generative AI in the Hardware Design Flow: from High-Level Synthesis to Security

Luca Collini, New York University, US

 

EDAA Outstanding Dissertation Awards

Topic 1 New directions in systems design methods and tools, simulation and validation, embedded software design and optimization for embedded, cyber-physical, secure and learning systems

Learning-Based Methods for Enabling On-Edge, Accurate, Sustainable, and Kuman Centered Intelligent Manufacturing

Luigi Capogrosso, Politecnicodi Torino, IT

Advisors: Marco Cristani, Franco Fummi

Topic 2 New directions in SoC platforms co-design, novel architectures for future computing in design flows, and power management

AI-driven Design and Optimization of Heterogeneous ChipletSystems for Server-Scale AI Workloads

Harsh Sharma, Washington State University, US

Advisors: Partha Pande, Jana Doppa

Topic 3 New directions in logic, physical design and CAD for analog/mixed-signal,nano-scale and emerging technologies

Equality Saturation for Circuit Synthesis and Verification

Samuel Coward, Imperial College London, UK

Advisor: George Constantinides

Topic 4 New directions in safety, reliability and security-aware hardware design, validation and test

Hardware-Firmware Security Co-Verification

Aruna Jayasena, University of Florida, US

Advisor: Prabhat Mishra

 

SIGDA PhD Dissertation Award 2026

Technology Mapping and Optimization Algorithms for Logic Synthesis of Advanced Technologies

Alessandro Tempia Calvino, École Polytechnique Fédérale de Lausanne, CH

Advisor: Giovanni De Micheli

 

SIGDA Outstanding New Faculty Award 2026

Meng Li

Assistant Professor
Peking University, CN

 

DATE Fellow Award

Aida Todri-Sanial, Eindhoven University of Technology, NL

for outstanding service contribution for DATE asGeneral Chair of DATE 2025

 

Best Paper Awards

D_low Track Design Methods and Tools

FSDB: A Folded-Store Dynamic-Broaden Hybrid Compute-in-ROM/SRAM Architecture for Deploying Large-Scale DNNs On-Chip

Tianyi Yu, Teng Yi, Huazhong Yang and Xueqing Li, Tsinghua University, CN
(Session BPA01)

D_high Track Design Methods and Tools

Torrent: A distributed DMA for Efficient and Flexible Point-to-Multipoint Data Movement

Yunhao Deng1, Fanchen Kong2, Xiaoling Yi2, Ryan Antonio3 and Marian Verhelst2, 1MICAS - KU Leuven, BE; 2KU Leuven, BE; 3MICAS KU Leuven, BE
(Session BPA02)

A Track Application Design

INSPIRE: In-Sensor Compressed Weight Retrieval for Enhancing ViTEfficiency at Edge

Sabbir Ahmed1, Deniz Najafi2, Mohaiminul Al Nahian1, Navid Khoshavi3, Abdullah Al Arafat4, Mamshad Nayeem Rizve5, Mahdi Nikdast6, Adnan Siraj Rakin7 and Shaahin Angizi2, 1Binghamton University (SUNY), US; 2New Jersey Institute of Technology, US; 3AMD, US; 4Florida International University, US; 5Adobe, US; 6Colorado State University, US; 7Binghamton University, US
(Session BPA03)

T Track Test and Dependability

RIFT: A Scalable Methodology for LLM Accelerator Fault Assessment using Reinforcement Learning

Khurram Khalil, Muhammad Mahad Khaliq and Khaza Anuarul Hoque, University of Missouri, US
(Session BPA04)

E Track Embedded Systems Design

KirbyMM: Outer-Product Based Matrix Multiplication on ARMv9 Processor

LanshuHuang, Han Huang, ZhiguangChen and Yutong Lu Sun, Yat-sen University, CN
(Session BPA02)

Outstanding Reviewer Awards

D Track

Lorenzo Ferretti, Micron Technology, US

Siting Liu, ShanghaiTech University, CN

Yukai Chen, IMEC, BE

Nicoleta Cucu Laurenciu, Radbout University, NL

A Track

Bahar Farahani, Shahid Beheshti University, IR

Jo Vliegen, KU Leuven, BE

T Track

Mohammad Hasan Ahmadilivani, Tallinn University of Technology, EE

Johann Knechtel, New York University Abu Dhabi, AE

E Track

BaekGyu Kim, Daegu Gyeongbuk Institute of Science & Technology, KR

Yasmina Abdeddaim, University Gustave Eiffel, CNRS, LIGM, FR