Date: Wednesday 26 March 2014
Time: 16:00 - 18:00
Location / Room: University Booth, Booth 3, Exhibition Area

Label	Presentation Title Authors
UB08.01	VIDEO-BASED ABSOLUTE NAVIGATION APPROACH: A NOVEL APPROACH FOR VIDEO-BASED ABSOLUTE NAVIGATION IN SPACE EXPLORATION MISSIONS Authors: Pascal Trotta, Tadewos Getahun Tadewos, Paolo Prinetto, Daniele Rolfo and Pascal Trotta, Politecnico di Torino, IT Abstract Nowadays, space agencies have increased their research efforts in order to enhance the success rate of space exploration missions. Future space missions will increasingly adopt Video Based Navigation (VBN) systems to assist the entry, descent and landing (EDL) phase of space modules. This poster will show a preliminary work on a novel approach for Video-based Absolute Navigation (VBAN). Moreover, the poster depicts how a VBAN processing chain can exploit FPGA devices to achieve high throughput. Several visual results will be shown to highlight the peculiarities of the proposed approach. More information ...
UB08.02	HIPACC: AUTOMATIC GPU CODE GENERATION FOR ANDROID Authors: Oliver Reiche1, Richard Membarth2, Frank Hannig1 and Jürgen Teich1 1University of Erlangen-Nuremberg, DE; 2Saarland University, DE Abstract We present the Heterogeneous Image Processing Acceleration (HIPAcc) framework. It allows programmers to develop image preprocessing applications while providing high productivity, flexibility, and portability as well as competitive performance. The same algorithm description serves as basis for targeting different GPU accelerators and low-level languages. Hereby, imaging algorithms can be expressed in a compact and productive way by using a domain-specific language (DSL) that is embedded into C ++ code. Using the HIPAcc source-to-source compiler, DSL code is compiled to CUDA, OpenCL, C/C ++, or even Renderscript code, which targets heterogeneous architectures on recent MPSoCs running Android. Programming those MPSoCs can be challenging, in particular when targeting different architectures (CPU/GPU/DSP). HIPAcc lifts this burden from programmers by automatically applying source code transformations based on domain knowledge and a built-in architecture model. This demonstration shows the seamless integration of HIPAcc into the Android Developer Tools and provides a live comparison of generated code to functional identical handwritten naive implementations of image filters on recent MPSoCs running Android. More information ...
UB08.04	GEMINI: A NEW SYNTHESIS AND OPTIMIZATION TOOL FOR GRAPHENE-BASED DIGITAL DEVICES Authors: Valerio Tenace, Andrea Calimera, Massimo Poncino and Enrico Macii, Politecnico di Torino, IT Abstract Gemini is a synthesis and optimization software for graphene-based digital devices. Given a combinational circuit description through its boolean representation, Gemini produces a SPICE netlist mapped with graphene PN-Junction gates. The software is composed of a parser library to handle input circuit descriptions, a characterization library of graphene gates used in the synthesis process, a Biconditional Binary Decision Diagram library used to manipulate logic networks in Pass-XNOR logic in order to better exploit the intrinsic characteristics of the adopted graphene gates, and a number of optimization algorithms designed to produce better results in terms of area and thus power consumption. As a stand-alone software or as a library easy to integrate into state-of-the-art tools, Gemini represents a first step of an enabling technology for future synthesis and optimization processes for graphene-based devices. More information ...
UB08.05	TOMAHAWK2: PERFORMANCE IMPACT OF INSTRUCTION SET ARCHITECTURE EXTENSIONS FOR DYNAMIC TASK SCHEDULING UNITS Author: Oliver Arnold, Technische Universität Dresden, DE Abstract In this demo a heterogeneous MPSoC is controlled by a dynamic task scheduling unit called CoreManager. The instruction set architecture of this unit has been extended to improve performance for dynamic data dependency checking, task scheduling, processing element allocation and data transfer management. The MPSoC as well as the NoC are integrated in a cycle-accurate virtual system prototype. The performance impact of the CoreManager is analyzed on component as well as on system level. More information ...
UB08.06	LEGO: TOOLS FOR HYBRID INTEGRATION Author: Fredrik Jonsson, Royal Institute of Technology, SE Abstract Performance of printed devices depends on the geometry, but is also affected by processing steps of other components integrated onto the same substrate. Since different designs use different devices, process stack, models and design rules must be dynamically determined. In this work we propose and demonstrate an experimental design flow to allow efficient design of hybrid and printed electronic circuits. More information ...
UB08.07	UVM-SYSTEMC-AMS: UVM STANDARD-COMPLIANT SYSTEMC (AMS)-BASED VERIFICATION FRAMEWORK FOR HETEROGENEOUS SYSTEMS Authors: Zhi Wang1, Yao Li2, Marie-Minerve Louerat2, Francois Pecheux2, Martin Barnasconi3, Thilo Vörtler4 and Karsten Einwich4 1Laboratoire d'informatique de Paris 6, FR; 2UPMC-LIP6, FR; 3NXP, NL; 4Fraunhofer IIS, DE Abstract Today's societal needs for innovative products in terms of communication, mobility, health, entertainment, and safety directly impact microelectronics design methodologies. The embedded systems are simultaneously software-driven, digitally assisted, complex and heterogeneous, but existing verification methodologies are mostly focused on pure digital devices and are completely decoupled from analog verification. This presentation shows how the principles of the new UVM methodology can be soundly enhanced to offer to the test designer a flexible framework for the virtual prototyping of multi-discipline testbenches that supports both digital and Analog Mixed-Signal (AMS) at the architectural level. More information ...
18:00	End of session
19:30	DATE Party in "Gläserne Manufaktur" of the Volkswagen AG The DATE Party is again scheduled on the second conference day, Wednesday, March 26, 2014, starting from 19:30 h. This year, it will take place in one of Dresden's most exciting and modern buildings, the "Gläserne Manufaktur" of the car manufacturer Volkswagen AG (www.glaesernemanufaktur.de/en/). The party will feature a flying buffet style dinner with various catering points and accompanying drinks. Light background music and the possibility of guided visits through the extraordinary premises will round off the evening. It provides a perfect opportunity to meet friends and colleagues in a relaxed atmosphere while enjoying local amenities. Please kindly note that it is no seated dinner. All delegates, exhibitors and their guests are encouraged to attend the party. Please be aware that entrance is only possible with a party ticket. Each full conference registration includes a ticket for the DATE Party. Additional tickets can be purchased on-site at the registration desk (subject to availability of tickets). Ticket price for the full Evening Social Programme: 75 € per person.