Date: Wednesday 26 March 2014
Time: 11:00 - 12:30
Location / Room: Exhibition Theatre

Time	Label	Presentation Title Authors
11:00	6.8.1	ACHIEVING FIRST-TIME-RIGHT SILICON IN ANALOG DESIGNS - A FOUNDRY PERSPECTIVE Speaker: Jörg Doblaski, X-FAB, DE Abstract Today's demanding analog- and mixed-signal applications often do not allow for a "second shot": Due to both schedule- and budget requirements, costly and time-consuming re-spins of all components need to be avoided to be successful. "First-Time-Right" is the goal for these designs. The presentation will outline the challenges involved in achieving first-time-right analog designs. It will highlight what impact the choice of process architecture makes, and will discuss the pros and cons of different process architectures, such as BCD and SOI. Fabless companies rely on their foundry to provide not only the right processes, but also excellent modeling of process and devices, and highquality, feature-rich process design kits. The influence of the design kit quality will be discussed in a second part of the presentation, as well as choice of the right EDA tools and design flows. Finally, it will be discussed how the relationship between foundry, fabless company and EDA provider needs to be developed in order to better support First-Time-Right in analog- and mixed signal designs.
11:30	6.8.2	EXPLORING THE DESIGN-SPACE WITH "FAATS" TO ACHIEVE FIRST-TIME-RIGHT SILICON IN ANALOG DESIGNS Speaker: Markus Meissner, University of Frankfurt, DE Abstract The demand for lower supply voltages, faster processing speeds, smaller technology nodes, the accompanied higher variation impact under constantly reduced product cycles, significantly increases the necessity for automation during the design of analog modules. This presentation demonstrates the recent progress on the research of the "Fully Automated Analog Topology Synthesis Framework" (FAATS) by introducing its unique approach to elevate automated analog circuit design to the next step. How valuable an extensive design-space exploration can support "First-Time-Right" requirements is presented on different (design) case studies and an exclusive peek into an ongoing ASIC development strongly driven by FAATS.
12:30		End of session Lunch Break in Exhibition Area Sandwich lunch