4.1 EXECUTIVE SESSION: Addressing Challenges of Reliable Chips

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Date: Tuesday 25 March 2014
Time: 17:00 - 18:30
Location / Room: Saal 1

Organiser:
Yervant Zorian, Fellow & Chief Architect, Synopsys, US

Executives:
Dan Alexandrescu, President & CEO, iROC Technologies, FR
Robert Aitken, Fellow, ARM, US
Robert Hum, GM & VP, Mentor Graphics, US
Stefan Singer, Fellow, Freescale, DE

While today's SOCs systematically use semiconductor production quality assessment and optimization solutions, meeting end-product requirements for reliability and availability augments the need to prepare the SOC design in advance to address such requirements. The speakers in this executive session will address the current trends and challenges in the semiconductor reliability and discuss the level of readiness needed in a chip to meet today's SOC requirements.

TimeLabelPresentation Title
Authors
18:30End of session
Exhibition Reception in Several serving points inside the Exhibition Area (Terrace Level)
The Exhibition Reception will take place in the exhibition area (Terrace Level). All exhibitors are welcome to provide drinks and snacks for delegates and visitors.