M03 How Emerging Memory Technology Will Reshape Future Computing
Organizers:
- Jian-Jia Chen, TU Dortmund University
- Hussam Amrouch, University of Stuttgart
- Jörg Henkel, Karlsruhe Institute of Technology
Speaker(s):
- Jian-Jia Chen, TU Dortmund University, Germany
- Hussam Amrouch, University of Stuttgart, Germany
- Yuan-Hao Chang (Johnson Chang), Academia Sinica, Taiwan
Motivation:
- Due to low leakage power, high density, and low unit cost, emerging byte-addressable NVM architectures are being considered as main memory and storage in the near future.
- This tutorial is to present and discuss commendable technologies and their impact to outlook potential researches and cooperation.
- It is unique and timely for the DATE community, since presenters have expertise in both the system/architecture-level side and technology side to draw a vision of novel emerging techniques and their impact across different abstraction layers.
Goal: The goal of this tutorial is to present and discuss commendable technologies and their impact on emerging byte-addressable non-volatile memories (NVM).
Technical Details:
In this tutorial we will discuss various non-volatile memories. One of them will be Ferroelectric Field-Effect Transistor (FeFET), which is a promising non-volatile, area-efficient and low-power combined logic and memory. FeFET is compatible with the existing CMOS fabrication process. We will show how bit-errors induced by FeFETs (due to temperature effects and process variation effects) can be modeled from the device level to system level and then how the impact of such bit-errors can be accurately quantified and mitigated in the context of Binary Neural Networks (BNNs). Other types of NVMs will be also discussed demonstrating how system-level managements could be impacted.
Schedule (Time Zone: GMT +1):
- 07:00 - 07:10: Opening
- 07:10 - 08:00: Emerging Devices (ReRam, FeFET, NCFET)
- 08:00 - 08:05: coffee/breakfast break
- 08:05 - 08:40: Neural Network Techniques for Systems with NVMs, from CPU Cache, Main Memory and Processing-in-Memory
- 08:40 - 09:20: Random Forest Training Techniques for Systems with NVMs
- 09:20 - 09:30: break
- 09:30 - 10:00: Full system-level NVM simulation and optimization
- 10:00 - 10:25: Demo and Q&A
- 10:25 - 10:30: break
- 10:30 - 11:00: Vision of Integration of Future Technology
Necessary background:
- Computer Architecture