Racyics GmbH

Racyics GmbH (Booth: Campus FDSOI)

Contact: Holger Eisenreich

Racyics GmbH
Bergstraße 56
01069 Dresden

Tel: +49 351 4188720
Fax: +49 351 41887299

Racyics GmbH

E-Mail: eisenreich@racyics.de
Website: www.racyics.com

Our core strength is outstanding performance. Racyics® founders and key team members worked together at Technische Universität Dresden, Germany, since 2003.

They were involved in numerous advanced research projects in close cooperation with leading European semiconductor companies. These projects resulted in various award-winning designs of ultra-low power multi-million gates SoCs and complex mixed signal circuits in advanced nodes.

Based on that experienced team, Racyics was established in 2009 as an independent design service provider with focus on advanced nodes. Since then, Racyics executed design services for leading global microelectronic companies like Infineon and Intel, as well as for German hidden champions such as Hyperstone.

Right from the beginning, Racyics took advantage from having Europe’s largest semiconductor fab, GLOBALFOUNDRIES Fab1, next door. In close collaboration with the local GLOBALFOUNDRIES® design enablement team and the Technische Universität Dresden the first 28nm design was taped-out in 2012. Racyics became GLOBALFOUNDRIES® channel partner for EMEA in 2013 and FDXcelerator™ partner in 2017.

The Racyics’ in-house design flow is enabled for various advanced nodes including GLOBALFOUNDRIES® 22FDX® and 14LPP. Growing fast and continuously, Racyics moved to a new 800 m² office in 2015. Now a complete mixed-signal design team counting over 30 employees delivers professional services with a direct link to world class research of Technische Universität.

ASIC and SOC Design:

  • Design Entry
  • Behavioural Modelling & Simulation
  • Synthesis
  • Power & Optimisation
  • Physical Analysis (Timing, Themal, Signal)
  • Verification
  • Analogue and Mixed-Signal Design
  • RF Design

System-Level Design:

  • Behavioural Modelling & Analysis
  • Physical Analysis
  • Hardware/Software Co-Design
  • Package Design
  • PCB & MCM Design


  • Design for Test
  • Design for Manufacture and Yield
  • Test Automation (ATPG, BIST)
  • Boundary Scan
  • Mixed-Signal Test
  • System Test


  • Design Consultancy
  • Prototyping
  • Data Management and Collaboration


  • Development Boards

Semiconductor IP:

  • Analogue & Mixed Signal IP
  • Memory IP
  • Physical Libraries
  • Synthesizable Libraries
  • Test IP
  • Verification IO

Application-Specific IP:

  • Analogue & Mixed Signal IP