Low‐Power 3D Integration using Inductive Coupling Links for Neurotechnology Applications

Benjamin J. Fletcher1,a, Shidhartha Das2, Chi‐Sang Poon3 and Terrence Mak1,b
1Department of Electronics and Computer Science University of Southampton, UK
abjf1g13@ecs.soton.ac.uk
btmak@ecs.soton.ac.uk
2ARM Ltd, Cambridge, UK
Shidhartha.Das@arm.com
3Harvard‐MIT Health Sciences and Technology, Massachusetts Institute of Technology, USAz
cpoon@mit.edu

ABSTRACT


Three dimensional system integration offers the ability to stack multiple dies, fabricated in disparate technologies, within a single IC. For this reason, it is gaining popularity for use in sensor devices which perform concurrent analogue and digital processing, as both analogue and digital dies can be coupled together. One such class of devices are closed‐loop neuromodulators; neurostimulators which perform real‐time digital signal processing (DSP) to deliver bespoke treatment. Due to their implantable nature, these devices are inherently governed by very strict volume constraints, power budgets, and must operate with high reliability. To address these challenges, this paper presents a low‐power inductive coupling link (ICL) transceiver for 3D integration of digital CMOS and analogue BiCMOS dies for use in closed-loop neuromodulators. The use of an ICL, as opposed to through silicon vias (TSVs), ensures high reliability and fabrication yield in addition to circumventing the use of voltage level conversion between disparate dies, improving power efficiency. The proposed transceiver is experimentally evaluated using SPICE as well as nine traditional TSV baseline solutions. Results demonstrate that, whilst the achievable bandwidth of the TSV‐based approaches is much higher, for the typical data rates demanded by neuromodulator applications (0.5 ‐ 1 Gbps) the ICL design consumes on average 36.7% less power through avoiding the use of voltage level shifters.



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