Logic Optimization with Considering Boolean Relations

Tung‐Yuan Lee¹, Chia‐Cheng Wu¹, Chia‐Chun Lin¹, Yung‐Chih Chen² and Chun‐Yao Wang^1
1National Tsing Hua University, Hsincu, Taiwan, R.O.C.
²Yuan Ze University, Chungli, Taiwan, R.O.C.

ABSTRACT

Boolean Relation (BR) is a many‐to‐many mapping between two domains. Logic optimization considering BR can exploit the potential flexibility existed in logic networks to minimize the circuits. In this paper, we present a logic optimization approach considering BR. The approach identifies a proper sub‐circuit and locally changes its functionality by solving the corresponding BR in the sub‐circuit without altering the overall functionality of the circuit. We conducted experiments on a set of MCNC benchmarks that cannot be further optimized by resyn2 script in ABC. The experimental results show that the node counts of these benchmarks can be further reduced. Additionally, when we apply our approach followed by the resyn2 script repeatedly, we can obtain 6.11% improvements in average

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