A Co‐design Methodology for Scalable Quantum Processors and their Classical Electronic Interface
Jeroen van Dijk1,2, Andrei Vladimirescu1,3,4, Masoud Babaie1, Edoardo Charbon1,2,5,6 and Fabio Sebastiano1
1Delft University of Technology, Delft, The Netherlands
2Kavli Institute of Nanoscience, Delft, The Netherlands
3University of California, Berkeley, CA
4Institut Supérieur d'Electronique de Paris, Paris, France
5Intel Corporation, Hillsboro, OR
6EPFL, Lausanne, Switzerland
ABSTRACT
A quantum computer fundamentally comprises a quantum processor and a classical controller. The classical electronic controller is used to correct and manipulate the qubits, the core components of a quantum processor. To enable quantum computers scalable to millions of qubits, as required in practical applications, the simultaneous optimization of both the classical electronic and quantum systems is needed. In this paper, a co‐design methodology is proposed for obtaining an optimized qubit performance while considering practical trade‐offs in the control circuits, such as power consumption, complexity, and cost. The SPINE (SPIN Emulator) tool set is introduced for the co-design and co‐optimization of electronic/quantum systems. It comprises a circuit simulator enhanced with a Verilog‐A model emulating the quantum behavior of single‐electron spin qubits. Design examples show the effectiveness of the proposed methodology in the optimization, design and verification of a whole electronic/quantum system.
