W07.6 Keynote Speech: On-chip Power Distribution Network as Unintentional Channel for Passive and Active Attacks - Falk Schellenberg

Session Start
Fri, 13:00
Session End
Fri, 13:50

Keynote speech of Falk Schellenberg from Ruhr University Bochum, Germany

Bio of the speaker:

Since 2020, Falk Schellenberg is associated with the Max-Planck-Institute for Cybersecurity and Privacy in Bochum, Germany, while at the same time being a post-doctoral researcher at the chair for Embedded Security, Ruhr University Bochum, Germany (since 2019). He received his Ph.D. degree in IT-Security in 2018, his M.Sc. degree in 2012, and his B.Sc. degree in 2010 from Ruhr University Bochum. His research interests include implementation attacks, i.e., fault injection and side-channel attacks, and protection against hardware Trojans.

Title of the talk:

On-chip Power Distribution Network as Unintentional Channel for Passive and Active Attacks

Abstract of the talk:

Highly-integrated SoCs as well as security-heterogeneous or potentially multi-tenant CPUs, FPGAs, or Cloud-architectures are arising. This led to various recent findings showcasing potential side-channel vulnerabilities where a tenant or process is able to spy on (or to influence) a victim residing on the same SoC, CPU, or Cloud-instance etc. Many of those attacks are caused security flaws in the logical isolation, e.g., cache attacks. Recently however, we have seen many attacks that exploit the underlying analog level as unintentional channel. Thus, and most importantly, such vulnerabilities are invisible and cannot be countered solely on the logical level. As with classical side-channel attacks, those attacks come in two flavors: a) passive attacks that spy on neighboring victims, and b) active attacks that cause faults in neighbor’s computation up to a complete denial-of-service. We will mainly cover both types of attacks on FPGAs, i.e., reaching from one part of the FPGA-fabric to another within the same system, even passing through logical isolation. In addition, we will briefly discuss creating covert channels in such scenarios and similar attacks on architectures beyond FPGAs, such as mixed-signal microcontrollers.