2.8 EU/ESA projects on Heterogeneous Computing

Session Start
Tue, 11:30
Session End
Tue, 13:00

In the scope of this session the presented EU/ESA projects cover topics related to the control electronics and data processing architecture and functionality of the Wide Field Imager, one of two scientific instruments of the next European X-ray observatory ATHENA; task-based programming models to provide a software ecosystem for heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines; and a framework to allow Big Data solutions to dynamically and transparently exploit heterogeneous hardware accelerators.

Time Label Presentation Title
Authors
11:30 2.8.1 ESA ATHENA WFI ONBOARD ELECTRONICS - DISTRIBUTED CONTROL AND DATA PROCESSING (WORK IN PROGRESS IN THE PROJECT)
Speaker:
Markus Plattner, Max Planck Institute for extraterrestrial Physics, DE
Authors:
Markus Plattner1, Sabine Ott1, Jintin Tran1, Christopher Mandla1, Manfred Steller2, Harald Jeszensky2, Roland Ottensamer3, Jan-Christoph Tenzer4, Thomas Schanz4, Samuel Pliego4, Konrad Skup5, Denis Tcherniak6, Chris Thomas7, Julian Thornhill7 and Sebastian Albrecht1
1Max Planck Institute for extraterrestrial Physics, DE; 2IWF - Space Research Institute, AT; 3University Vienna, AT; 4University of Tübingen, DE; 5CBK Warsaw, PL; 6Technical University of Denmark, DK; 7University of Leicester, GB
Abstract
Within this paper, we describe the control electronics and data processing architecture and functionality of the Wide Field Imager (WFI). WFI is one of two scientific instruments of the next European X-ray observatory ATHENA whose development started five years ago. Meanwhile, a conceptual design, development models and a number of technology development activities have been performed.
12:00 2.8.2 LEGATO: LOW-ENERGY, SECURE, AND RESILIENTTOOLSET FOR HETEROGENEOUS COMPUTING
Speaker:
Pascal Felber, University of Neuchâtel, CH
Authors:
Behzad Salami1, Konstantinos Parasyris1, Adrian Cristal1, Osman Unsal1, Xavier Martorell1, Paul Carpenter1, Raul De La Cruz1, Leonardo Bautista1, Daniel Jimenez1, Carlos Alvarez1, Saber Nabavi1, Sergi Madonar1, Miquel Pericàs2, Pedro Trancoso2, Mustafa Abduljabbar2, Jing Chen2, Pirah Noor Soomro2, Madhavan Manivannan2, Micha von dem Berge3, Stefan Krupop3, Frank Klawonn4, Amani Mihklafi4, Sigrun May4, Tobias Becker5, Georgi Gaydadjiev5, Hans Salomonsson6, Devdatt Dubhashi6, Oron Port7, Yoav Etsion8, Le Quoc Do9, Christof Fetzer9, Martin Kaiser10, Nils Kucza10, Jens Hagemeyer10, René Griessl10, Lennart Tigges10, Kevin Mika10, Arne Hüffmeier10, Marcelo Pasin11, Valerio Schiavoni11, Isabelly Rocha11, Christian Göttel11 and Pascal Felber11
1Barcelona Supercomputing Center, ES; 2Chalmers University of Technology, SE; 3Christmann Informationstechnik + Medien GmbH & Co. KG, DE; 4Helmholtz-Zentrum für Infektionsforschung GmbH, DE; 5MAXELER, GB; 6MIS, SE; 7TECHNION, IL; 8Technion, IL; 9TUD, DE; 10UNIBI, DE; 11UNINE, CH
Abstract
The LEGaTO project leverages task-based programming models to provide a software ecosystem for Made-in-Europe heterogeneous hardware composed of CPUs, GPUs, FPGAs and dataflow engines. The aim is to attain one order of magnitude energy savings from the edge to the converged cloud/HPC, balanced with the security and resilience challenges. LEGaTO is an ongoing three-year EU H2020 project started in December 2017.
12:30 2.8.3 EFFICIENT COMPILATION AND EXECUTION OF JVM-BASED DATA PROCESSING FRAMEWORKS ON HETEROGENEOUS CO-PROCESSORS
Speaker:
Athanasios Stratikopoulos, University of Manchester, GB
Authors:
Christos Kotselidis1, Ioannis Komnios2, Orestis Akrivopoulos3, Sebastian Bress4, Katerina Doka5, Hazeef Mohammed6, Georgios Mylonas7, Vassilis Spitadakis8, Daniel Strimpel9, Juan Fumero1, Foivos S. Zakkak1, Michail Papadimitriou1, Maria Xekalaki1, Nikos Foutris1, Athanasios Stratikopoulos1, Nectarios Koziris5, Ioannis Konstantinou5, Ioannis Mytilinis5, Constantinos Bitsakos5, Christos Tsalidis8, Christos Tselios3, Nikolaos Kanakis3, Clemens Lutz4, Viktor Rosenfeld4 and Volker Markl4
1University of Manchester, GB; 2Exus Ltd., US; 3Spark Works ITC Ltd., GB; 4German Research Center for Artificial Intelligence, DE; 5National TU Athens, GR; 6Kaleao Ltd., GB; 7Computer Technology Institute & Press Diophantus, GR; 8Neurocom Luxembourg, LU; 9IProov Ltd., GB
Abstract
This paper addresses the fundamental question of how modern Big Data frameworks can dynamically and transparently exploit heterogeneous hardware accelerators. After presenting the major challenges that have to be addressed towards this goal, we describe our proposed architecture for automatic and transparent hardware acceleration of Big Data frameworks and applications. Our vision is to retain the uniform programming model of Big Data frameworks and enable automatic, dynamic Just-In-Time compilation of the candidate code segments that benefit from hardware acceleration to the corresponding format. In conjunction with machine learning-based device selection, that respect user-defined constraints (e.g., cost, time, etc.), we enable dynamic code execution on GPUs and FPGAs transparently to the user. In addition, we dynamically re-steer execution at runtime based on the availability of resources. Our preliminary results demonstrate that our approach can accelerate an existing Apache Flink application by up to 16.5x.
13:00   End of session