ET6.8.3 Connecting Design, Manufacturing and Assembly in the Moore’s Law 2.0 Era

Paul Cohen, SEMI/ESDA, United States

As device scaling predicted by Moore’s Law becomes more difficult and costly, designers are looking towards new solutions to deliver increasing system level functionality and performance along with lower power and cost. The International Technology Roadmap for Semiconductors (ITRS) served as a designer’s guide to upcoming technologies for many years until it’s retirement in 2016. The Heterogeneous Integration Roadmap (HIR) provides a new guideline for system level integration for the coming decades. This includes new technologies which will have an impact on the tradeoffs facing designers. In addition, the increasing use of silicon in products and applications with long lifetimes and critical safety requirements suggests that long term process effects can no longer be safely ignored. All of this requires increased communication amongst all aspects of system design, manufacture, and assembly as we move towards Moore 2.0.