In preparations for DATE 2021, the Organizing Committees will continue to closely monitor the development of the worldwide Covid-19 situation and adjust the conference format accordingly. Updated information will always be available on this page.

ET6.8 Solutions for EDA Design Environments

Session Start
Wed, 11:00
Session End
Wed, 12:30

At DATE 2020 Exhibition Theatre leading experts provide attendees with their advice on the latest technologies in the field, covering applications as well as solutions for the design process. In this session Altair and SEMI/ESDA will cover design environments and IP enabling for different levels of abstraction and multi-physics simulations, as well as the Heterogeneous Integration Roadmap (HIR) for connecting design, manufacturing and assembly.

Presentations

ET6.8.1 Future Vision of Altair for EDA Applications

Start
11:00
End
11:20

Today the design of EDA applications are not only focused on hardware/software parts. In many cases as in mechatronic, powertrain and control systems, the environment has to be used with the design itself at different level of abstraction. Altair is providing environments which now help users to interact with dedicated solvers and to handle multi-physics simulations.

ET6.8.2 Saving Serious Money with License First Scheduling

Start
11:20
End
11:45

Often seen as a minor detail in job scheduling, we present an alternative view where we treat software licenses as the primary consideration in job dispatch.  Through some innovative techniques we will show how license utilization can be doubled with real world examples.

ET6.8.3 Connecting Design, Manufacturing and Assembly in the Moore’s Law 2.0 Era

Start
11:45
End
12:10

As device scaling predicted by Moore’s Law becomes more difficult and costly, designers are looking towards new solutions to deliver increasing system level functionality and performance along with lower power and cost. The International Technology Roadmap for Semiconductors (ITRS) served as a designer’s guide to upcoming technologies for many years until it’s retirement in 2016. The Heterogeneous Integration Roadmap (HIR) provides a new guideline for system level integration for the coming decades. This includes new technologies which will have an impact on the tradeoffs facing designers. In addition, the increasing use of silicon in products and applications with long lifetimes and critical safety requirements suggests that long term process effects can no longer be safely ignored. All of this requires increased communication amongst all aspects of system design, manufacture, and assembly as we move towards Moore 2.0.