W07.4 Session 1: Security of Hardware Platforms

Session Start
Fri, 10:30
Session End
Fri, 11:00

Ezinam Bertrand Talaki, Mathieu Bouvier Des Noes, Olivier Savry, and David Hely; Side-channel Leakage Assessment On RISC-V Architecture (15 mins)
Florian Unterstein, Tolga Sel, Thomas Zeschg, Nisha Jacob, Michael Tempelmeier, Michael Pehl, and Fabrizio De Santis; Secure Update of FPGA-based Secure Elements using Partial Reconfiguration (15 mins)