Technical Programme Committee 2018

Printer-friendly version PDF version

Topic: T2 Test Generation, Simulation and Diagnosis

Algorithms for test pattern generation (TPG); TPG for delay and small-delay faults; TPG for low power; algorithms for test compression and compaction; ATPGs; fault simulation; diagnosis; power issues in testing; test generation for microprocessors, memories, FPGAs and regular structures; algorithms for board and system test; volume diagnosis and yield analysis.

Chair: Matteo Sonza Reorda, Politecnico di Torino - DAUIN, IT, Contact

Co-Chair: Davide Appello, STMicroelectronics, IT, Contact


  • Stephan Eggersglüß, Mentor Graphics, DE, Contact
  • Emil Gizdarski, Synopsys, US, Contact
  • Huawei Li, Institute of Computing Technology, Chinese Academy of Sciences, CN, Contact
  • Arnaud Virazel, LIRMM, FR, Contact