Compiler support for multi-core/many-core architectures, GPUs, CGRAs, FPGAs, accelerators in heterogeneous computing platforms, memory hierarchy including caches, scratchpad, and non-volatile memories; code analysis, optimization, and generation for different metrics (e.g., performance, power/energy, code/data size, reliability, security, WCET, etc.); just-in-time compilation, interpreters, binary translation; compiler support for enhanced debugging, profiling, and traceability; Software tools and techniques for design space exploration (compilers, simulators, synthesis tools); compilation infrastructures for high-level synthesis and domain-specific or streaming languages for embedded systems; software synthesis for IoT, wearables, cyber-physical systems, programmable microfluidics.
Chair: Frank Hannig, Friedrich-Alexander University Erlangen-Nürnberg, DE, Contact
Co-Chair: Bjorn De Sutter, Ghent University, BE, Contact
Members: