Technical Programme Committee 2018

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Topic: DT5 Design and Test for Analog and Mixed-Signal Circuits and Systems, and MEMS

Layout and topology generation; architecture, system and circuit synthesis and optimization; formal and symbolic techniques; HW description languages and models of computation; innovative circuit topologies and architectures; MEMS; self-healing and self-calibration; test generation; fault modeling and simulation; built-in self-test; design-for-test; fault diagnosis; defect characterization and failure analysis; on-line test and fault tolerance; design-for-manufacturability and design-for-yield; test metrics and economics.

Chair: Andrè Ivanov, University of British Columbia, CA, Contact

Co-Chair: Georges Gielen, KU Leuven, BE, Contact


  • Manuel Barragan, TIMA Laboratory, FR, Contact
  • Francisco V. Fernandez, IMSE-CNM, CSIC and Univ. Sevilla, ES, Contact
  • Deukhyoun Heo, Washington State University, US, Contact
  • Nuno Horta, Instituto de Telecomunicações /Instituto Superior Técnico – Universidade de Lisboa, PT, Contact
  • Gildas Leger, Instituto de Microelectronica de Sevilla, IMSE-CNM, (CSIC - Universidad de Sevilla), ES, Contact
  • Mark Po-Hung Lin, National Chung Cheng University, TW, Contact
  • Marie-Minerve Louerat, CNRS and University Pierre et Marie Curie, FR, Contact
  • Shahriar Mirabbasi, University of British Columbia, CA, Contact
  • Manoj Sachdev, University of Waterloo, CA, Contact
  • Shreyas Sen, ECE, Purdue University, US, Contact
  • Gerd Vandersteen, Vrije Universiteit Brussel - dept. ELEC, BE, Contact