Technical Programme Committee 2017

Printer-friendly version PDF version

Topic: D7 Network on Chip

Architecture and modeling techniques for NoC; Design methodologies and architectures for on-chip interconnection networks: topology, switching, routing and flow control; NoC service frameworks for Quality of Service, security and power management; Techniques and methodologies for NoC testing; GALS and asynchronous architectures for NoCs; Integration of external interfaces/memory controllers with NoCs; Cache-coherent NoCs; hardware/software communication abstraction, component-based modeling, platform-based design and methodologies, NoC design space exploration frameworks; Programming models for NoC-based platforms; design of NoCs targeting alternative technologies (photonics/optics, wireless, 3D stacking, etc.).

Chair: Luca Carloni, Columbia University, US, Contact Luca Carloni

Co-Chair: Sébastien Le Beux, Lyon Institute of Nanotechnology, FR, Contact Sébastien Le Beux