Topic: DT5 Design and Test for Analog and Mixed-Signal Circuits and Systems, and MEMS

Layout and topology generation; architecture, system and circuit synthesis and optimization; formal and symbolic techniques; hardware description languages and models of computation; innovative circuit topologies and architectures; MEMS; self-healing and self-calibration; test generation; fault modeling and simulation; built-in self-test; design-for-test; fault diagnosis; defect characterization and failure analysis; on-line test and fault tolerance; design-for-manufacturability and design-for-yield; test metrics and economics.

Chair: André Ivanov, , CA, Contact

Co-Chair: Georges Gielen, Katholieke Universiteit Leuven, BE, Contact

Members:

• Josep Altet, Universitat Politècnica de Catalunya, ES, Contact
• Manuel Barragan, TIMA Laboratory, FR, Contact
• Christoph Grimm, TU Vienna, AT, Contact
• Deukhyoun Heo, Washington State University, US, Contact
• Nuno Horta, Instituto de Telecomunicações, Instituto Superior Técnico – TU Lisbon, PT, Contact
• Gildas Leger, IMSE-CNM-CSIC, ES, Contact
• Mark Po-Hung Lin, National Chung Cheng University, TW, Contact
• marie-Minerve Louerat, UNiversity Pierre & Marie Curie, LIP6, FR, Contact
• Shahriar Mirabbasi, UBC, CA, Contact
• Jaijeet Roychowdhury, University of California at Berkeley, US, Contact
• Manoj Sachdev, University of Waterloo, CA, Contact
• Shreyas Sen, Purdue University, US, Contact
• Gerd Vandersteen, Vrije Universiteit Brussel, BE, Contact