Topic: D8 Architectural and Microarchitectural Design

Architectural and micro-architectural design techniques; memory systems; power and energy efficient architectures; multi/many-core architectures; multi-threading techniques and support for parallelism; application-specific processors and accelerators; architectural support for reliability, security, timing predictability.

Chair: Cristina Silvano, Politecnico di Milano, IT, Contact

Co-Chair: Elaheh Bozorgzadeh, University of California, Irvine, US, Contact

Members:

• Mladen Berekovic, Technische Universität Braunschweig, DE, Contact
• Christos Bouganis, Imperial College, GB, Contact
• Ramon Canal, Universitat Politècnica de Catalunya (UPC), ES, Contact
• Jeronimo Castrillon, TU Dresden, Germany, DE, Contact
• Francisco Cazorla, BSC, ES, Contact
• Giuseppe Desoli, STMicroelctronics, IT, Contact
• , Contact
• Leandro Fiorin, IBM Research, NL, Contact
• Houman Homayoun, George Mason University, US, Contact
• Georgios Keramidas, Think Silicon S.A./Technological Educational Institute of Western Greece, GR, Contact
• Yun (eric) Liang, Peking University, CN, Contact
• Andrea Marongiu, ETH Zurich, CH, Contact
• Gokhan Memik, Northwestern University, US, Contact
• Dionisios Pnevmatikatos, Technical University of Crete, GR, Contact
• Laura Pozzi, USI Lugano, CH, Contact
• Toshinori Sato, Fukuoka University, JP, Contact
• Olivier Sentieys, CAIRN,IRISA, FR, Contact
• Zili Shao, Hong Kong Polytechnic University, HK, Contact
• Antonino Tumeo, Pacific Northwest National Laboratory, US, Contact
• Cong Xu, HP Lab, US, Contact
• Sotirios Xydis, National Technical University of Athens, GR, Contact