W06 The 3rd International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS Workshop)
Agenda
| Time | Label | Session |
|---|---|---|
| 08:30 | W06.1 | Introduction to OPTICS Workshop Chair: Co-Chair: |
| 08:35 | W06.2 | Morning Session I: What is New on the Technology Side? Chair: |
| 08:35 | W06.2.1 | Electro-Optical Integration Technology for High-Bandwidth Optical Interconnects Bert Jan Offrein, IBM Zurich Research Lab., CH |
| 09:05 | W06.2.2 | On the Way to Photonic Interposers, Building Blocks for Short-Distance Optical Communication Yvain Thonnart, CEA, LETI, MINATEC, FR |
| 09:25 | W06.2.3 | Germanium Receivers for Low Power Consumption Photonic Circuits Laurent Vivien, CNRS, FR |
| 09:45 | W06.2.4 | Opportunities and Obstacles of Monolithic III-V Integration on Silicon Yoan Leger, CNRS – FOTON, FR |
| 10:05 | W06.2.5 | Short Presentations of Accepted Poster Papers |
| 10:30 | W06.3 | Coffee Break and Poster Session |
| 11:00 | W06.4 | Morning Session II: Applications of Silicon Photonics Chair: |
| 11:00 | W06.4.1 | Applications of CMOS-Compatible Integrated Photonics Beyond Interconnect and Telecom Xavier Rottenberg, IMEC, BE |
| 11:20 | W06.4.2 | Optics in Data Center Disaggregation Alan Mickelson, University of Colorado Boulder, US |
| 11:40 | W06.4.3 | An Optical Parallel Adder Towards Light Speed Data Processing Tohru Ishihara, Kyoto University, JP |
| 12:00 | W06.5 | Lunch Break and Poster Session |
| 13:00 | W06.6 | Afternoon Session I: Opportunities and Challenges! Chair: |
| 13:00 | W06.6.1 | Scaling Up Silicon Photonic Circuits: Where Are the Challenges? Wim Bogaerts, Ghent University-IMEC, BE |
| 13:30 | W06.6.2 | Impact of Planar Photonic Switch Architecture on Worse-Case Power Penalty Sebastien Rumley, University of Columbia, US |
| 13:50 | W06.6.3 | Towards Accurate Silicon Photonics Platform Qualification for Static and Dynamic Purposes Jean-Francois Carpentier, STMicroelectronics, FR |
| 14:10 | W06.6.4 | Temperature Sensitivity Analysis and Power Consumption Optimization of Optical Networks-on-Chip Yaoyao Ye, Shanghai Jiao Tong University, CN |
| 14:30 | W06.7 | Coffee Break and Poster Session |
| 15:00 | W06.8 | Afternoon Session II: Design Automation and Methodologies! Chair: |
| 15:00 | W06.8.1 | Towards Electronic-Photonic Design Automation for Optical Interconnect Networks Nikolay Karelin, VPIphotonics, BY |
| 15:20 | W06.8.2 | Challenges for mask layout for silicon photonic devices and circuits Marcel van der Vliet, PhoeniX, NL |
| 15:40 | W06.8.3 | From Circuit-Level to Component-Level Simulation and Back - PDK Driven Design Automation Jonas Flueckiger, Lumerical, CA |
| 16:00 | W06.8.4 | Design Automation Beyond its Electronic Roots: Toward a Synthesis Methodology for Wavelength-Routed Optical Networks-on-Chip Davide Bertozzi, University of Ferrara, IT |
| 16:20 | W06.8.5 | Silicon Photonics Scalable Design Framework: From Design Concept to Physical Verification Sarhan Hossam, Mentor, FR |
| 16:40 | W06.9 | Panel Discussion Moderator: Panelists: |
| Panelists: | ||
| 17:20 | W06.10 | Concluding Remarks and Closing Session Chair: Co-Chairs: |
| 19:30 | W06.11 | OPTICS Networking Event (Dinner) Please check the OPTICS website (http://www.ece.ust.hk/~eexu/OPTICS.html) for more information! Send an email to mahdi [dot] nikdast |
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