Technical Programme Committee 2016
Topic: DT5 Design and Test for Analog and Mixed-Signal Circuits and Systems
Layout and topology generation; architecture, system and circuit synthesis and optimization; formal and symbolic techniques; hardware description languages and models of computation; innovative circuit topologies and architectures; self-healing and self-calibration; test generation; fault modeling and simulation; built-in self-test; design-for-test; fault diagnosis; defect characterization and failure analysis; on-line test and fault tolerance; design-for-manufacturability and design-for-yield; test metrics and economics.
Chair: Andre Ivanov, UBC, CA, Contact
Co-Chair: Helmut Graeb, Technische Universitaet Muenchen, DE, Contact
Members:
- Manuel Barragan, TIMA Laboratory, FR, Contact
- Árpád Bürmen, University of Ljubljana, SI, Contact
- Catherine Dehollain, EPFL, CH, Contact
- Günhan Dündar, Boğaziçi University, TR, Contact
- Georges Gielen, Katholieke Universiteit Leuven, BE, Contact
- Christoph Grimm, TU Vienna, AT, Contact
- Lars Hedrich, University of Frankfurt, DE, Contact
- Nuno Horta, Instituto de Telecomunicações, Instituto Superior Técnico – TU Lisbon, PT, Contact
- Gildas Leger, IMSE-CNM-CSIC, ES, Contact
- (Mark) Po-Hung Lin, National Chung Cheng University, TW, Contact
- Dominique MORCHE, CEA-Leti, FR, Contact
- Jaijeet Roychowdhury, UC Berkeley, US, Contact
- Haralampos-G. Stratigopoulos, Sorbonne Universités, UPMC Univ. Paris 6, CNRS, LIP6, FR, Contact
- Gerd Vandersteen, Vrije Universiteit Brussel, BE, Contact