Technical Programme Committee 2016

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Topic: D2 System Design, High-Level Synthesis and Optimization

High-level and system-level synthesis techniques; high-level design languages; system-level models for design and optimization; methods for hardware/software co-design and partitioning; control and data flow analysis; hardware/software interface and protocol communication synthesis; interface-based and correct-by-construction designs; high-level and system-level scheduling, allocation and binding techniques; multi-objective optimization techniques (performance, power, reliability, security) for high-level and system design; platform-based and reuse-centric design methods and architectures; hw/sw design patterns for multi-core system on chip (MPSoC) and distributed, networked embedded systems; system-level design of heterogeneous computing systems.

Chair: Andreas Herkersdorf, TU München, DE, Contact

Co-Chair: Nikil Dutt, Unviersity of California, Irvine, US, Contact

Members:

  • Alberto A. Barrio del, Universidad Complutense de Madrid: UCM, ES, Contact
  • Lars Bauer, KIT, DE, Contact
  • Philippe Coussy, Universite de Bretagne Sud / Lab-STICC, FR, Contact
  • Suhaib A. Fahmy, University of Warwick, GB, Contact
  • Michael Glaß, University of Erlangen, DE, Contact
  • Kim Grüttner, OFFIS - Institute for Information Technology, DE, Contact
  • Soonhoi Ha, Seoul National University, KR, Contact
  • Yuko Hara-Azumi, Tokyo Institute of Technology, JP, Contact
  • Dirk Koch, University of Manchester, GB, Contact
  • Luciano Lavagno, Politecnico di Torino, IT, Contact
  • Roman Lysecky, University of Arizona, US, Contact
  • Christian Plessl, University of Paderborn, DE, Contact
  • Donatella Sciuto, Politecnico di Milano, It, Contact
  • Todor Stefanov, Leiden University, NL, Contact
  • David Thomas, Imperial College London, GB, Contact
  • Jason Xue Chun, City University of Hong Kong, HK, Contact
  • Daniel Ziener, FAU Erlangen, DE, Contact