CW02 OpenES & CONTREX Projects Workshop: System-Level Power and Temperature Specification, Modelling and Analysis

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Seminar 1


Kim Grüttner, OFFIS - Institute for Information Technology, DE (Contact Kim Grüttner)
Laurent Maillet-Contoz, STMicroelectronics, FR (Contact Laurent Maillet-Contoz)
Adam Morawiec, ECSI, FR (Contact Adam Morawiec)

With the predicted device, core and multicore scaling, a recent study revealed that regardless of chip organization and topology, multicore scaling is power limited. It has been predicted that at 22 nm, 21% of a fixed-size chip must be powered off, and at eight nm, even more than 50%. A system engineer should be able to plan the power intent and break is down to the different hardware resources. With regard to the software, a system engineer should be aware of any possible cross-application interferences with respect to timing, power and thermal properties, as soon as possible in the design flow. Power and temperature management shall be considered in conjunction with the application needs and platform capabilities. For this reason, power and temperature properties need to be modelled and analyzed at the system level, because they can strongly affect the overall quality of service (performance, battery lifetime) or even cause the system to fail meeting its real-time and safety requirements.

In this talk, we present our perspectives on the integration and usage of power and temperature models in SystemC and IP-XACT. This covers the specification of platform properties (extra-functional model) as well as the dynamic capturing, processing, and extraction of power/temperature information during the simulation. In particular, the following topics will be addressed:

  • Modeling of extra-functional properties (especially power and temperature) in executable system-level models (ESL models)
  • Estimation techniques to build/generate/annotate ESL models with extra-functional properties and extra-functional property models
  • Expression of Power Management techniques on ESL
  • Specification and monitoring of extra-functional properties
  • Integration with relevant standards to support future interoperability of models: SystemC, IP-XACT
  • Integration into industrial tools

Planned Program

9:00 - 9:15

Opening and Workshop Overview

9:15 - 10:00

OpenES Modeling Toolkit

Laurent Maillet-Contoz (STMicroelectronics, France)

10:00 - 10:30

Case Study: IP-XACT Extensions for Safety-Critical Embedded Systems

Ralph Weissnegger (CISC, Austria)

10:30 - 11:00

Coffee Break & Exhibition

11:00 - 11:30

Power State Machines: State-based System-level Power Estimation and Modelling

Daniel Lorenz (OFFIS, Germany)

11:30 - 12:00

From RTL IP to Functional System-Level Models with Extra-Functional Properties

Franco Fummi (EDALab, Italy)

12:00 - 12:30

Incremental traceability framework for functional and extra-functional properties in embedded system design

Matthieu Pfeiffer (Magillem, France)

12:30 - 13:30

Lunch & Exhibition

13:30 - 14:00

Timed Value Streams: Tracing, Monitoring and Analysis of Extra-functional Properties in SystemC

Kim Grüttner (OFFIS, Germany)

14:00 - 14:30

Timed Value Stream-based Power and Temperature Model

Ralph Görgen (OFFIS, Germany)

14:30 - 15:00

Coffee Break & Exhibition

15:00 - 15:45

Discussion: Enhance Interoperability of Models and Tools by Upgrading and Extending Existing Open Standards (SystemC TLM, SystemC-AMS, IP-XACT)

15:45 - 16:00

Closing and Concluding Remarks

This workshop is supported by the European projects OpenES ( and CONTREX (