W6 MEDIAN - Workshop on Manufacturable and Dependable Multicore Architectures at Nanoscale

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Agenda

Agenda

TimeLabelSession
08:30W6.1Opening Session

Organisers:
Oliver Bringmann, FZI/University of Tuebingen, DE
Mehdi Tahoori, Karlsruhe Institute of Technology, DE

Chair:
Maria K Michael, University of Cyprus, CY

Co-Chair:
Ozcan Ozturk, Bilkent University, TR


Welcoming comments
08:45W6.2Keynote Talk
08:45W6.2.1Designing Efficient and Reliable Multicore Processors for Networking, Servers, and Beyond
Shubu Mukherjee, Cavium Networks, US

09:45W6.3Paper Session I: New Challenges at the System Level
09:45W6.3.1Multi-Core Emulation for Dependable and Adaptive Systems Prototyping
Cristiana Bolchini and Matteo Carminati, Politecnico di Milano, IT

09:45W6.3.2Fault-tolerant Routing Approach for 3D Stacked Meshes
Masoumeh Ebrahimi, Masoud Daneshtalab and Juha Plosila, University of Turku, FI

10:30W6Coffee Break
11:00W6.4Paper Session II: Reliability Threads in New Technologies
11:00W6.4.1Invited Talk - Steep Slope Devices: Opportunities and Challenges for Processor Design
Vijaykrishnan Narayanan, Penn State, US

11:00W6.4.2BTI reliability from Planar to FinFET nodes: Will the next node be more or less reliable?
Halil Kukner1, Pieter Weckx2, Praveen Raghavan1, Ben Kaczer1, Doyoung Jang1, Francky Catthoor3, Liesbet Van der Perre2, Rudy Lauwereins3 and Guido Groeseneken3
1IMEC, BE; 2KU Leuven, BE; 3IMEC, KU Leuven, BE

11:00W6.4.3Analysis of Random Dopant Fluctuations and Oxide Thickness on a 16nm L1 Cache Design*)
Cagri Eryilmaz1, Azam Seyedi2, Ozman Unsal3 and Andrian Cristal4
1Middle Eastern Technical University, TR and Barcelona Supercomputing Center, ES, ; 2Barcelona Supercomputing Center and Universitat Politecnica de Catalunya, ES; 3Barcelona Supercomputing Center, ES; 4Barcelona Supercomputing Center, Universitat Politecnica de Catalunya and IIIA-CSIC, ES

12:00W6Lunch Break
13:00W6.5Paper Session III: Application Specific Solutions
13:00W6.5.1FPGA Defect Tolerance based on Equivalent Configurations Generation
Parthasarathy M. B. Rao, Abdulazim Amouri and Mehdi B. Tahoori, Karlsruhe Institute of Technology, DE

13:00W6.5.2A Complex Control System for Testing Fault-Tolerance Methodologies*)
Jakub Podivinsky, Marcela Simkova and Zdenek Kotasek, Brno University of Technology, CZ

13:30W6.6Panel Session

Organiser:
Said Hamdioui, TU Delft, NL

Chair:
Matteo Sonza Reorda, Politecnico di Torino, IT

Panelists:
Speakers:
Mehdi Tahoori1, Oliver Bringmann2, Adrian Evans3 and Viacheslav Izosimov4
1Karlsruhe Institute of Technology, DE; 2FZI/University of Tuebingen, DE; 3iROC, FR; 4Semcon, SE
14:30W6.7Coffee Break & Poster Session
14:30W6.7.1BADR: Boosting Reliability Through Dynamic Redundancy
Ihsen Alouani1, Smail Niar1, Mazen Saghir2 and Fadi Kurdahi3
1University of Valenciennes, FR; 2Texas A&M University, QA; 3University of California at Irving, US

14:30W6.7.2Automatic Detection and Correction of Defective Pixels for Medical and Space Imagers
Eliahu Cohen1, Moriel Shnitser2, Tsvika Avraham2, Ofer Hadar2 and Yocheved Dotan3
1Tel-Aviv University, IL; 2Ben-Gurion University, IL; 3Ruppin Academic Center, IL

14:30W6.7.3Implementing Double Error Correction Orthogonal Latin Squares Codes in Xilinx FPGAs
Mustafa Demirci1, Pedro Reviriego2 and Juan Antonio Maestro2
1Alesan, TR; 2Universidad Antonio de Nebrija, ES

14:30W6.7.4On Reliability Enhancement Using Adaptive Core Voltage Scaling and Variations on TSMC 28nm LP process process FPGAs
Petr Pfeifer and Zdenek Pliva, Technical University of Liberec, CZ

14:30W6.7.5Power and Performance Optimization in Long-term Operation
André Romão1, Jorge Semião1, Carlos Leong2, Marcelino Santos3, Isabel Teixeira3 and Paulo Teixeira3
1University of Algarve, PT; 2INESC-ID, PT; 3Technical University of Lisbon, PT

15:00W6.8Paper Session IV: Resiliency, Self-Test and Self-Diagnosis
15:00W6.8.1Invited Talk - DEEP-ER: Scalable resiliency in Exascale Computing
Michael Kauschke, Intel, DE

15:00W6.8.2Improving the Reliability of Skewed Caches through ECC based Hashes
Sercan Yegin1, Burak Karsli1, Oguz Ergin1, Marco Ottavi2, Salvatore Pontarelli2 and Pedro Reviriego3
1TOBB University, TR; 2University of Rome Tor Vergata, IT; 3Universidad Antonio de Nebrija, ES

15:00W6.8.3A new Diagnostic method for VLIW Processors*)
Davide Sabena, Luca Sterpone and Matteo Sonza Reorda, Politecnico di Torino, IT

15:00W6.8.4Aging Monitoring Methodology for Built-In Self-Test Applications*)
João Coelho1, Jorge Semião1, Carlos Leong2, Marcelino Santos3, Isabel Teixeira3 and Paulo Teixeira3
1University of Algarve, PT; 2INESC-ID, PT; 3Technical University of Lisbon, PT

16:15W6.9Closing Session

*)indicates short paper

Groups: