Thursday 27 March 2014 At-A-Glance

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Interactive Presentations: 10:00 - 10:30 IP4 (in room Conference Level, foyer) / 15:30 - 16:00 IP5 (in room Conference Level, foyer)

Track /
Room
08:30 - 10:0010:00 - 10:3010:00 - 12:0011:00 - 12:3012:00 - 14:3013:30 - 14:0014:00 - 15:3014:30 - 16:3015:30 - 16:0016:00 - 17:30
Track 1
Saal 1
9.1 SPECIAL DAY Hot Topic: CMOS scaling - from evolutionary to revolutionary computing10.1 SPECIAL DAY Hot Topic: Memories today and tomorrow11.1 SPECIAL DAY Embedded Tutorial: Alternatives to CMOS12.1 SPECIAL DAY Hot Topic: The future of interfacing to the natural world
Track 2
Konferenz 6
9.2 Low-Cost, High-Performance NoCs10.2 Wireless NoCs11.2 Transitioning NoC Design Techniques to Future Challenges12.2 Hot topic: How Secure are PUFs Really? On the Reach and Limits of Recent PUF Attacks
Track 3
Konferenz 1
9.3 Hardware Implementations for Data Security10.3 Green Computing Systems11.3 Industry relevant research and practice for system design12.3 Multimedia Systems
Track 4
Konferenz 2
9.4 Timing challenges in validation10.4 System-level evaluation11.4 Enabling validation on fast platforms12.4 Physical Aspects
Track 5
Konferenz 3
9.5 Hot Topic: Connecting Different Worlds - Technology Abstraction for Reliability-Aware Design and Test10.5 Analysis of Components and Systems11.5 Memory Resource Allocation and Scheduling in MPSoC12.5 System-level Design Space Exploration
Track 6
Konferenz 4
9.6 Schedulability analysis10.6 Multi-processor and distributed systems11.6 System-Level Thermal Estimation and Management12.6 Error Resilience and Power Management
Track 7
Konferenz 5
9.7 Timing Analysis and Cell Design10.7 Advances in Synthesis11.7 Power and Emerging Technologies in Reconfigurable Computing12.7 Built-in Self-Test Solutions for Mixed-Signal and RF ICs
Track 8
Exhibition Theatre
9.8 Embedded Tutorial: Memcomputing: the Cape of Good Hope10.8 EDA+3D+MEMS Innovation Agenda 2020 Fueling the Innovation Chain of Electronics11.8 Embedded Tutorial: GPGPUs: how to combine high computational power with high reliability12.8 Panel: Future SoC verification methodology: UVM evolution or revolution?
Track
Conference Level, foyer
IP4 Interactive PresentationsIP5 Interactive Presentations
Track
University Booth, Booth 3, Exhibition Area
UB09 Session 9UB10 Session 10UB11 Session 11
Track 0
Saal 1
11.0 Special Day Keynote