Technical Programme Committee 2013

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Topic: D5 Power Estimation and Optimization

Algorithms, techniques and tools for power and temperature modeling, estimation and optimization of electronic systems applicable at all levels of the design hierarchy, from system-level specification to layout, including software and run-time management.

Chair: Massimo Poncino, Politecnico di Torino, IT, Contact

Co-Chair: Jian-Jia Chen, KIT, DE, Contact

Members:

  • Edith Beigne, CEA-LETI Minatec, FR, Contact
  • Yiran Chen, Seagate Technology, US, Contact
  • William Fornaciari, Politecnico di Milano - DEI, IT, Contact
  • Josef Haid, Infineon, AT, Contact
  • Joerg Henkel, Karlsruhe Institute of Technology, DE, Contact
  • Francesc Moll, Universitat Politècnica de Catalunya, ES, Contact
  • Mauro Olivieri, Sapienza University of Rome, IT, Contact
  • Anand Raghunathan, Purdue University, US, Contact
  • Olivier Sentieys, INRIA - University of Rennes 1, FR, Contact
  • Ranga Vemuri, University of Cincinnati, US, Contact
  • Xiaorui Wang, University of Ohio, US, Contact
  • Chia-Lin Yang, National Taiwan University, TW, Contact