Technical Programme Committee 2013

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Topic: A5 Secure Systems

Secured systems need a combination of hardware, software and embedded techniques to succeed. Indeed, the weakest link in the security chain determines the overall system security. This topic therefore invites papers on novel technologies and experiences for specific security problems as well as overall design integration methods for secure systems-on-chip and embedded systems. Topics of interest are situated at all design abstraction levels and include novel techniques and architectures for embedded cryptography; modeling, characterization, simulation and associated countermeasures for side-channel, fault and other physical attacks; random numbers generation, embedded secure processors and co-processors, trusted computing, off-chip memories and network-on-chip enciphering and integrity checking, trust establishment and attestation; implementation of security applications; hardware enabled security, including physically unclonable functions, and more.

Chair: Patrick Schaumont, Virginia Tech, US, Contact

Co-Chair: Guido Bertoni, STMicroelectronics, IT, Contact

Members:

  • Ray Cheung, City University of Hong Kong, HK, Contact
  • Viktor Fischer, Laboratoire Hubert Curien, FR, Contact
  • Wieland Fischer, Infineon, DE, Contact
  • Tim Güneysu, Ruhr University Bochum, DE, Contact
  • Paolo Maistri, TIMA Laboratory, FR, Contact
  • Maire O'Neill, Queen's University Belfast, UK, Contact
  • Jerome Quevremont, Thales, FR, Contact
  • Francesco Regazzoni, Université catholique de Louvain and ALaRI, CH, Contact
  • Ingrid Verbauwhede, KU Leuven and UCLA, BE, Contact