Technical Programme Committee 2012
Topic: D3 Simulation and Validation
Simulation-based verification; post-silicon validation; hardware/software co-simulation and validation, ATPG for validation; transaction-level validation; semi-formal verification techniques; testbench generation; design error debug and diagnosis; advanced simulation and emulation techniques from system to circuit level; simulation accelerators; multi-domain simulation techniques for mixed systems.
Chair: Valeria Bertacco, University of Michigan, US, Contact
Co-Chair: Franco Fummi, Universita' di Verona, IT, Contact
Members:
- Andrea Acquaviva, Politecnico di Torino, IT, Contact
- Pallab Dasgupta, Indian Institute of Technology Kharagpur, IN, Contact
- Rand Gray, Intel Corporation, US, Contact
- Daniel Grosse, University of Bremen, DE, Contact
- Ian Harris, University of Californa Irvine, US, Contact
- Michael Hsiao, Virginia Tech, US, Contact
- Florian Letombe, SpringSoft, FR, Contact
- Prabhat Mishra, University of Florida, US, Contact
- Ronny Morad, IBM Research - Haifa, IL, Contact
- Pablo Sanchez, University of Cantabria, ES, Contact
- Jaan Raik, Tallinn University of Technology, Department of Computer Engineering, EE, Contact
- Shireesh Verma, Conexant Systems Inc., US, Contact
- Mark Zwolinski, University of Southampton, UK, Contact