W06 The 3rd International Workshop on Optical/Photonic Interconnects for Computing Systems (OPTICS Workshop)

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Date: 
2017-03-31
Time: 
08:30-17:30
Location / Room: 
TBA

General Chairs

Jiang Xu, Hong Kong University of Science and Technology, CN (Contact Jiang Xu)
Sébastien Le Beux, Lyon Institute of Nanotechnology, FR (Contact Sébastien Le Beux)

Programme Chair

Mahdi Nikdast, Polytechnique Montréal/McGill University, CA (Contact Mahdi Nikdast)

Programme Committee Members

Akihiko Shinya, NTT Basic Research Lab., JP (Contact Akihiko Shinya)
Alan Mickelson, University of Colorado Boulder, US (Contact Alan Mickelson)
Ayse Coskun, Boston University, US (Contact Ayse Coskun)
Daniel Chillet, INRIA, FR (Contact Daniel Chillet)
Davide Bertozzi, University of Ferrara, IT (Contact Davide Bertozzi)
Fabiano Hessel, PUCRS, BR (Contact Fabiano Hessel)
Ian O'Connor, Ecole Centrale de Lyon, FR (Contact Ian O'Connor)
Isabella Cerutti, Scuola Superiore Sant'Anna, IT (Contact Isabella Cerutti)
John Ferguson, Mentor Graphics Corporation, US (Contact John Ferguson)
Nikos Hardavellas, Northwestern University, US (Contact Nikos Hardavellas)
Olivier Sentieys, INRIA - University of Rennes 1, FR (Contact Olivier Sentieys)
Sandro Bartolini, University of Siena, IT (Contact Sandro Bartolini)
Sebastien Rumley, University of Columbia, US (Contact Sebastien Rumley)
Yaoyao Ye, Shanghai Jiao Tong University, CN (Contact Yaoyao Ye)
Yvain Thonnart, CEA, LETI, MINATEC, FR (Contact Yvain Thonnart)

Scope of the Workshop

Multiprocessor System-on-Chip (MPSoC) is becoming the standard for high-performance computing systems. The performance of an MPSoC is determined not only by the performance of its processing cores and memories, but also by how efficiently they collaborate with one another. As the technology advances and allows the integration of many processing cores, metallic interconnects in MPSoCs will consume significant power while imposing high latency and low bandwidth. Shifting to the many-core era necessitates considering an alternative interconnect technology to replace the traditional electrical interconnects. Among such technologies, photonic technology has demonstrated promising potentials to address the aforementioned issues with the metallic interconnects in MPSoCs. In this context, high-performance silicon photonic devices and circuits are necessary to construct photonic interconnect networks. Furthermore, it is required to explore the feasibility and performance of photonic interconnects as well as the guidelines and design requirements to realize such interconnects. OPTICS aims at discussing the most recent advances in photonic interconnects and silicon photonics for computing systems. Industry's and academia's views on the feasibility and recent progress of optical interconnects and silicon photonics will be discussed. The workshop is comprised of invited talks of the highest caliber in addition to refereed poster presentations.

Topics to be discussed in the workshop include (but are not limited to) the following:

  • Design Methodologies, Modeling and Tools: design space exploration, optimization, thermal-aware design, floor-planning, system level modeling and simulation, etc.
  • Architectures/Micro-Architectures: hybrid optical-electronic interconnects, passive/active optical switched networks, communication protocols, etc.
  • Applications: high-performance computing, photonics interconnects for memory, many-core systems, and datacenters, etc.
  • Silicon Photonics Devices and Circuits: circuit demonstrators, on-chip lasers, photodetectors, electro-optic modulators, optical/photonic switches and routers, athermal devices, high-bandwidth I/O, packaging, etc.

Paper Submission

You are invited to participate and submit your contributions to OPTICS. Please refer to the workshop webpage for more information (http://www.ece.ust.hk/~eexu/OPTICS.html).

Agenda

TimeLabelSession
08:30W06.1Introduction to OPTICS Workshop

Chair:
Jiang Xu, Hong Kong University of Science and Technology, CN, Contact Jiang Xu

Co-Chair:
Mahdi Nikdast, Polytechnique Montréal/McGill University, CA, Contact Mahdi Nikdast

08:35W06.2Morning Session I: What is New on the Technology Side?

Chair:
Sébastien Le Beux, Lyon Institute of Nanotechnology, FR, Contact Sébastien Le Beux

08:35W06.2.1Electro-Optical Integration Technology for High-Bandwidth Optical Interconnects
Bert Jan Offrein, IBM Zurich Research Lab., CH

09:05W06.2.2Silicon Photonic Devices for High-Speed Data Interconnections
Tao Chu, Chinese Academy of Science, CN

09:25W06.2.3Germanium Receivers for Low Power Consumption Photonic Circuits
Laurent Vivien, CNRS, FR

09:45W06.2.4Opportunities and Obstacles of Monolithic III-V Integration on Silicon
Yoan Leger, CNRS – FOTON, FR

10:05W06.2.5Short Presentations of Accepted Poster Papers

10:30W06.3Coffee Break and Poster Session
11:00W06.4Morning Session II: Applications of Silicon Photonics

Chair:
Mahdi Nikdast, Polytechnique Montréal/McGill University, CA, Contact Mahdi Nikdast

11:00W06.4.1Applications of CMOS-Compatible Integrated Photonics Beyond Interconnect and Telecom
Xavier Rottenberg, IMEC, BE

11:20W06.4.2Optics in Data Center Disaggregation
Alan Mickelson, University of Colorado Boulder, US

11:40W06.4.3An Optical Parallel Adder Towards Light Speed Data Processing
Tohru Ishihara, Kyoto University, JP

12:00W06.5Lunch Break and Poster Session
13:00W06.6Afternoon Session I: Opportunities and Challenges!

Chair:
Jiang Xu, Hong Kong University of Science and Technology, CN, Contact Jiang Xu

13:00W06.6.1Scaling Up Silicon Photonic Circuits: Where Are the Challenges?
Wim Bogaerts, Ghent University-IMEC, BE

13:30W06.6.2Impact of Planar Photonic Switch Architecture on Worse-Case Power Penalty
Sebastien Rumley, University of Columbia, US

13:50W06.6.3Towards Accurate Silicon Photonics Platform Qualification for Static and Dynamic Purposes
Jean-Francois Carpentier, STMicroelectronics, FR

14:10W06.6.4On the Way to Photonic Interposers, Building Blocks for Short-Distance Optical Communication
Yvain Thonnart, CEA, LETI, MINATEC, FR

14:30W06.7Coffee Break and Poster Session
15:00W06.8Afternoon Session II: Design Automation and Methodologies!

Chair:
Sébastien Le Beux, Lyon Institute of Nanotechnology, FR, Contact Sébastien Le Beux

15:00W06.8.1Towards Electronic-Photonic Design Automation for Optical Interconnect Networks
Sergei F. Mingaleev, VPIphotonics, BY

15:20W06.8.2Design Automation Beyond its Electronic Roots: Toward a Synthesis Methodology for Wavelength-Routed Optical Networks-on-Chip
Davide Bertozzi, University of Ferrara, IT

15:40W06.8.3From Circuit-Level to Component-Level Simulation and Back - PDK Driven Design Automation
Jonas Flueckiger, Lumerical, CA

16:00W06.8.4Temperature Sensitivity Analysis and Power Consumption Optimization of Optical Networks-on-Chip
Yaoyao Ye, Shanghai Jiao Tong University, CN

16:20W06.8.5Silicon Photonics Scalable Design Framework: From Design Concept to Physical Verification
Sarhan Hossam, Mentor Graphics, FR

16:40W06.9Panel Discussion

Moderator:
Jiang Xu, Hong Kong University of Science and Technology, CN, Contact Jiang Xu

Panelists:
Wim Bogaerts, Ghent University-IMEC, BE, Contact Wim Bogaerts
Jean-Francois Carpentier, STMicroelectronics, FR, Contact Jean-Francois Carpentier
Sergei F. Mingaleev, VPIphotonics, BY, Contact Sergei F. Mingaleev
Bert Jan Offrein, IBM Zurich Research Lab., CH, Contact
Laurent Vivien, CNRS, FR, Contact Laurent Vivien

17:20W06.10Concluding Remarks and Closing Session

Chair:
Sébastien Le Beux, Lyon Institute of Nanotechnology, FR, Contact Sébastien Le Beux

Co-Chairs:
Jiang Xu, Hong Kong University of Science and Technology, CN, Contact Jiang Xu
Mahdi Nikdast, Polytechnique Montréal/McGill University, CA, Contact Mahdi Nikdast

19:30W06.11OPTICS Networking Event (Dinner)

Please check the OPTICS website (http://www.ece.ust.hk/~eexu/OPTICS.html) for more information!

Send an email to mahdi [dot] nikdast at mcgill [dot] ca to register for the networking event!