W05 Second International Workshop on Resiliency in Embedded Electronic Systems (REES 2017)

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Wolfgang Müller, Universität Paderborn, DE (Contact Wolfgang Müller)
Daniel Müller-Gritschneder, Technische Universität München, DE (Contact Daniel Müller-Gritschneder)
Subhasish Mitra, Stanford University, US (Contact Subhasish Mitra)

Download handouts here (Handouts are available for attendees only! The password has been sent to you by email or you may ask for the password at the on-site registration desk.)

The REES workshop is a joint academic/industry forum considering multiple resiliency aspects from software to hardware and from embedded systems to chip level designs.

REES 2017 features a range academic talks with poster presentations from internal research groups as well as exciting industrial presentations from ARM Limited, NXP, Bosch GmbH, Hewlett Packard Enterprise, ST Microelectronics, Infineon Technologies, and Mentor Graphics. More information is available at https://www.edacentrum.de/rees


08:45W05.1WELCOME Address
09:00W05.2KEYNOTE Address
09:00W05.2.1Multi-Layer-Resilience: The Need for Discipline
Wolfgang Ecker, Infineon Technologies, DE

09:30W05.3Resilient Systems Designs I
09:30W05.3.1Introducing Fault Tolerance to the Regularity-Based Resource Partition Model
Darrell Knape, Albert M. K. Cheng and Yu Li, University of Houston, Texas, US

09:40W05.3.2Architecting Resilient IoT Systems
Kemal A. Delic and David M. Penkler, Hewlett Packard Enterprise, FR

09:50W05.3.3Utilization of Memristor Variability Towards Brain-Inspired Resilient Computing
Rawan Naous1 and Khaled Nabil Salama2
1King Abdullah University of Science and Technology, SA; 2KAUST, SA

10:00W05.3.4flexMEDiC: flexible Memory Error Detection by Combined Data Encoding and Duplication
Norman A. Rink1 and Jeronimo Castrillon2
1Technische Universität Dresden, DE; 2TU Dresden, Germany, DE

10:10W05.4Poster Discussions (Session I) & Refreshments
10:45W05.5Invited Industrial Talks - Resilient Systems in Practise
10:45W05.5.1Novel ISO26262 Compliant Architecture for Advanced Driver Assistance Systems
Luc van Dijk, NXP Semiconductors, NL

11:15W05.5.2Design-for-Resiliency in Dynamically Power Managed Systems
Liangzehn Lai, ARM Ltd., GB

11:45W05.6Resilient Systems Design II
11:45W05.6.1Correction of Transient Faults by Rollback with Low Overhead for Microcontrollers
Felix Mühlbauer1 and Mario Schölzel2
1Universität Potsdam, DE; 2IHP Frankfurt Oder, DE

11:55W05.6.2Prototyping Resilient Processing Cores in Workcraft
Georgy Lukyanov1, Alessandro de Gennaro2, Andrey Mokhov3, Paulius Stankaitis2 and Maxim Rykunov4
1Southern Federal University, Rostov-on-Don, RU; 2Newcastle University, GB; 3Newcastle upon Tyne U, GB; 4imec, BE

12:05W05.6.3Increasing the Robustness of Digital Circuits with Ring Oscillator Clocks
Lucas Machado1, Jordi Cortadella2 and Antoni Roca Perez1
1Universitat Politècnica de Catalunya, ES; 2Universitat Politecnica de Catalunya, ES

13:15W05.7Invited Industrial Talks - Resilient Design Tools and Methods
13:15W05.7.1Simultaneous Measurement of Defect Coverage and Tolerance in AMS ICs for ISO26262
Stephen Sunter, Mentor, CA

13:45W05.7.2Error Effect Simulation for Automotive using SystemC Virtual Prototypes
Andreas Mauderer, Robert Bosch GmbH, DE

14:15W05.8Fault Injection Automation
14:15W05.8.1An Automatic Injection Framework for Safety Assessements of Embedded Software Binaries
Peer Adelt1, Bastian Koppelmann2, Bernd Kleinjohann1 and Christoph Scheytt2
1C-LAB, DE; 2Heinz Nixdorf Institute, DE

14:25W05.8.2Revisiting Symbolic Software-implemented Fault Injection
Hoang Minh Le1, Vladimir Herdt1, Daniel Grosse2 and Rolf Drechsler3
1Universität Bremen, DE; 2University of Bremen, DE; 3University of Bremen/DFKI GmbH, DE

14:35W05.8.3Constraining Graph-based Test Case Generation by Fitness Landscaping
Stefan Mueller1, Jo Laufenberg1, Joachim Gerlach2, Thomas Kropf1 and Oliver Bringmann3
1University of Tuebingen, DE; 2Hochschule Albstadt-Sigmaringen, DE; 3Universität Tübingen, DE

14:55W05.8.4Closing the Gap Between FMEDA, FTA and Simulation Based Fault Injection at System Level
Adam Himmelsbach1, Sebastian Reiter1, Alexander Viehl2, Oliver Bringmann3 and Wolfgang Rosenstiel4
1FZI, DE; 2FZI Forschungszentrum Informatik, DE; 3Universität Tübingen, DE; 4University of Tübingen, DE

14:55W05.9Poster Discussions (Session III+V) & Refreshments
15:30W05.10Resilient Circuit Analysis
15:30W05.10.1Fault Injection Campaigns in Multi-Domain Virtual Prototypes
Raghavendra Koppak1, Oliver Bringmann2 and Andreas von Schwerin3
1University of Tübingen / Siemens AG, DE; 2Universität Tübingen, DE; 3Siemens AG, DE

15:40W05.10.2Workload Dependent Aged Circuit Reliability Analysis
Ajith Sivadasan1, Armelle Notin1, Vincent Huard1, Etienne Maurin1, Florian Cacho1 and Lorena Anghel2
1STMicroelectronics, FR; 2TIMA Laboratory, FR

15:50W05.10.3SPICE-Level Fault Injection with Likelihood Weighted Random Sampling - A Case Study
Liang Wu1, Saed Abughannam1, Wolfgang Müller2, Christoph Scheytt1 and Wolfgang Ecker3
1Heinz Nixdorf Institute, DE; 2Universität Paderborn, DE; 3Infineon Technologies, DE

16:00W05.10.4Resilient Large-Scale Physical Design
Roman Bazylevych1 and Lubov Bazylevych2
1Lviv Polytechnic National University, UA; 2Institute of Applied Problems of Mechanics and Mathematics NASU, UA

16:10W05.11Poster Discussions (Session VI)