Thursday, March 28, 2019 Technical Sessions

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Session LabelSession TitleTimeLocationDetails
9.1Special Day 208:30 - 10:00Room 1Read More
9.2High-Level Synthesis (D2_1)08:30 - 10:00Room 2Read More
9.3Special Session: RISC-V or RISK-V? Towards Secure Open Hardware (SS4_12)08:30 - 10:00Room 3Read More
9.4Where do NoC and Machine Learning meet? (D7_2)08:30 - 10:00Room 4Read More
9.5Attacking Memory and I/O Bottlenecks (D8_2)08:30 - 10:00Room 5Read More
9.6Reliability of highly-parallel architectures: an industrial perspective (A8)08:30 - 10:00Room 6Read More
9.7Runtime Predictability (E1_1)08:30 - 10:00Room 7Read More
9.8Special Session: IBM's Qiskit Tool Chain: Developing for and Working with Real Quantum Computers (SS6_17)08:30 - 10:00Exh. TheatreRead More
IP4Interactive Presentations10:00 - 10:30Conference Level, FoyerRead More
10.1Special Day 211:00 - 12:30Room 1Read More
10.2Special Session: Enabling Graph Analytics at Extreme Scales: Design Challenges, Advances, and Opportunities (SS5_14)11:00 - 12:30Room 2Read More
10.3System-level Dependability for Multicore and Real-time Systems (T4_2)11:00 - 12:30Room 3Read More
10.4Disruptive Technologies Ain't Fake News! (D13_2)11:00 - 12:30Room 4Read More
10.5SSD and data placement (D8_4)11:00 - 12:30Room 5Read More
10.6Self-adaptive resource management (A6_1)11:00 - 12:30Room 6Read More
10.7Architectures for emerging machine learning techniques (E2_3)11:00 - 12:30Room 7Read More
11.1Special Day 214:00 - 15:30Room 1Read More
11.2Novel techniques in optimization and high-level modeling of mixed-signal circuits (DT5_1)14:00 - 15:30Room 2Read More
11.3Special Session: Rebooting our Computing Models (SS1_7)14:00 - 15:30Room 3Read More
11.4Learning Gets Smarter (D13_1)14:00 - 15:30Room 4Read More
11.5Vitello e Mozzarella alla Fiorentina: Virtualization, Multicore, and Fault-Tolerance (D2_3)14:00 - 15:30Room 5Read More
11.6Design Automation Solutions for Microfluidic Platforms and Tasks (A7_2)14:00 - 15:30Room 6Read More
11.7Extending Scheduling Schemes (E1_2)14:00 - 15:30Room 7Read More
IP5Interactive Presentations15:30 - 16:00Conference Level, FoyerRead More
12.1Special Day 216:00 - 17:30Room 1Read More
12.2The Art of Synthesizing Logic (D12_2)16:00 - 17:30Room 2Read More
12.3Aging, calibration circuits and yield (T1_2)16:00 - 17:30Room 3Read More
12.4Design and Optimization for Low-Power Applications (D9_2)16:00 - 17:30Room 4Read More
12.5System Modelling for Analysis and Simulation (D1)16:00 - 17:30Room 5Read More
12.6Trojans and public key implementation challenges (A5_2)16:00 - 17:30Room 6Read More
12.7Emerging Strategies for Deep Neural Network Hardware (A7_2)16:00 - 17:30Room 7Read More