2.8 How Electronic Systems can benefit from Machine Learning and from ESD Alliance

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Date: Tuesday, March 26, 2019
Time: 11:30 - 13:00
Location / Room: Exhibition Theatre

Organiser:
Jürgen Haase, edacentrum, DE, Contact Jürgen Haase

In this session the Electronic System Design Alliance will present their newest initatives and results. Mentor, a Siemens Business will discuss approaches for application of Machine Learning for designing and producing microelectronics products. IngeniArs will analyze scenarios for realizing smart edge devices by using accelerators for executing Machine Learning and Deep Learning algorithms.

TimeLabelPresentation Title
Authors
11:302.8.1MACHINE LEARNING IS CHANGING THE GAME FOR VARIABILITY AND CHARACTERIZATION AND WILL SOON HELP ANALOG AND DIGITAL VERIFICATION
Speaker:
Amit Gupta, Mentor, a Siemens Business, US
Abstract

The Golden Age of machine learning is upon EDA. Over the past four years, we have seen large EDA suppliers and customers grow their internal ML teams and strategies, and ML research projects are emerging in all areas of EDA. But, we have not yet seen much of this investment convert into real production flows and work. This talk reviews a set of challenges that make it difficult to bring ML solutions to production for semiconductor design, and discusses approaches for solving them. We will discuss how these approaches are already benefiting variation-aware design and characterization flows, and the broader applicability to analog and digital verification.

12:002.8.2MACHINE LEARNING AT THE EDGE FOR EMBEDDED AND LOW POWER PLATFORMS: EXPLOITING THE INTEL MOVIDIUS NEURAL COMPUTING STICK
Speaker:
Gionata Benelli, IngeniArs, IT
Abstract

Machine Learning, Deep Learning and AI are a technology that lots of enterprise are using to provide smarter services to their customer. Usually, data are acquired by sensors and then sent to a cloud or a remote server to perform inference and get the results. This is no longer the only way, in fact, commercial products are already available to offload the execution of ML and deep-Learning algorithms from the CPU of small devices. In this talk we will analyse some scenarios in which these accelerators, like Neural Compute Stick, can be useful in meeting design goals and allow the realization of smarter edge device.

12:302.8.3THE ESD ALLIANCE - AT THE CENTER OF THE SEMICONDUCTOR UNIVERSE
Speaker:
Paul Cohen, ESDA, US
13:00End of session
Lunch Break in Lunch Area



Coffee Breaks in the Exhibition Area

On all conference days (Tuesday to Thursday), coffee and tea will be served during the coffee breaks at the below-mentioned times in the exhibition area.

Lunch Breaks (Lunch Area)

On all conference days (Tuesday to Thursday), a seated lunch (lunch buffet) will be offered in the Lunch Area to fully registered conference delegates only. There will be badge control at the entrance to the lunch break area.

Tuesday, March 26, 2019

Wednesday, March 27, 2019

Thursday, March 28, 2019