10.4 Disruptive Technologies Ain't Fake News!

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Date: Thursday, March 28, 2019
Time: 11:00 - 12:30
Location / Room: Room 4

Chair:
Elena Gnani, Università di Bologna, IT, Contact Elena Gnani

Co-Chair:
Aida Todri-Sanial, CNRS-LIRMM, FR, Contact Aida Todri-Sanial

Wanna see something real? This is the right session that covers a wide variety of disruptive technologies: from wireless 3D integration to photonics and thin film electronics, all the way to quantum computing.

TimeLabelPresentation Title
Authors
11:0010.4.1CODAPT: A CONCURRENT DATA AND POWER TRANSCEIVER FOR FULLY WIRELESS 3D-ICS
Speaker:
Benjamin Fletcher, University of Southampton, GB
Authors:
Benjamin Fletcher1, Shidhartha Das2 and Terrence Mak1
1University of Southampton, GB; 2ARM Ltd., GB
Abstract
Three dimensional system integration is a promising enabling technology for realising heterogeneous ICs, facilitating stacking of disparate elements such as MEMS, sensors, analogue components, memories and digital processing. Recently, research has looked to contactless 3D integration using inductive coupling links (ICLs) to provide a low-cost alternative to conventional contact-based approaches (e.g. through silicon vias) for 3D integration. In this paper, we present a novel, fully wireless, ICL architecture for Concurrent Data and Power Transfer (CoDAPT) between tiers of a 3D-IC. The proposed CoDAPT architecture uses only a single inductor for simultaneous power transmission and data communication, resulting in high area efficiency, whilst facilitating low-cost, straightforward die stacking. The proposed design is experimentally validated through full wave EM and SPICE simulation and demonstrates capability to communicate data vertically at a rate of 1.3Gbps/channel (utilising an area of only 0.052mm2) whilst simultaneously achieving power delivery of 0.83mW, under standard operating conditions. A case study is also presented, demonstrating that CoDAPT achieves an area reduction greater than 1.7x when compared with existing works, representing an important progression towards ultra low-cost 3D-ICs through fully wireless stacking.

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11:3010.4.2COMPILING PERMUTATIONS FOR SUPERCONDUCTING QPUS
Speaker:
Mathias Soeken, EPFL, CH
Authors:
Mathias Soeken, Fereshte Mozafari, Bruno Schmitt and Giovanni De Micheli, EPFL, CH
Abstract
In this paper we consider the compilation of quan- tum state permutations into quantum gates for physical quantum computers. A sequence of generic single-target gates, which realize the input permutation, are extracted using a decom- position based reversible logic synthesis algorithm. We present a compilation algorithm that translates single-target gates into a quantum circuit composed of the elementary quantum gate sets that are supported by IBM's 5-qubit and 16-qubit, and Rigetti's 8-qubit and 19-qubit superconducting transmon QPUs. Compared to generic state-of-the-art compilation techniques, our technique improves gate volume and gate depth by up to 58% and 49%, respectively.

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12:0010.4.3STOCHASTIC COMPUTING WITH INTEGRATED OPTICS
Speaker:
Hassnaa El-Derhalli, Concordia University, CA
Authors:
Hassnaa El-Derhalli1, Sébastien Le Beux2 and Sofiene Tahar1
1Concordia University, CA; 2Lyon Institute of Nanotechnology, FR
Abstract
Stochastic computing (SC) allows reducing hardware complexity and improving energy efficiency of error resilient applications. However, a main limitation of the computing paradigm is the low throughput induced by the intrinsic serial computing of bit-streams. In this paper, we address the implementation of SC in the optical domain, with the aim to improve the computation speed. We implement a generic optical architecture allowing the execution of polynomial functions. We propose design methods to explore the design space in order to optimize key metrics such as circuit robustness and power consumption. We show that a circuit implementing a 2nd order polynomial degree function and operating at 1Ghz leads to 20.1pJ laser consumption per computed bit.

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12:1510.4.4INKJET-PRINTED TRUE RANDOM NUMBER GENERATOR BASED ON ADDITIVE RESISTOR TUNING
Speaker:
Ahmet Turan Erpzan, Karlsruhe Institute of Technology, DE
Authors:
Ahmet Turan Erozan1, Rajendra Bishnoi1, Jasmin Aghassi-Hagmann2 and Mehdi Tahoori1
1Karlsruhe Institute of Technology, DE; 2Karlsruhe Institute of Technology, Offenburg University of Applied Science, DE
Abstract
Printed electronics (PE) is a fast growing technology with promising applications in wearables, smart sensors and smart cards since it provides mechanical flexibility, low-cost, on-demand and customizable fabrication. To secure the operation of these applications, True Random Number Generators (TRNGs) are required to generate unpredictable bits for cryptographic functions and padding. However, since the additive fabrication process of PE circuits results in high intrinsic variation due to the random dispersion of the printed inks on the substrate, constructing a printed TRNG is challenging. In this paper, we exploit the additive customizable fabrication feature of inkjet printing to design a TRNG based on electrolyte-gated field effect transistors (EGFETs). The proposed memory-based TRNG circuit can operate at low voltages (≤ 1 V), it is hence suitable for low-power applications. We also propose a flow which tunes the printed resistors of the TRNG circuit to mitigate the overall process variation of the TRNG so that the generated bits are mostly based on the random noise in the circuit, providing a true random behaviour. The results show that the overall process variation of the TRNGs is mitigated by 110 times, and the simulated TRNGs pass the National Institute of Standards and Technology Statistical Test Suite.

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12:30IP5-4, 435EXPLOITING WAVELENGTH DIVISION MULTIPLEXING FOR OPTICAL LOGIC SYNTHESIS
Speaker:
David Z. Pan, University of Texas, Austin, US
Authors:
Zheng Zhao1, Derong Liu2, Zhoufeng Ying1, Biying Xu1, Chenghao Feng1, Ray T. Chen1 and David Z. Pan1
1University of Texas, Austin, US; 2Cadence Design Systems, US
Abstract
Photonic integrated circuit (PIC), as a promising alternative to traditional CMOS circuit, has demonstrated the potential to accomplish on-chip optical interconnects and computations in ultra-high speed and/or low power consumption. Wavelength division multiplexing (WDM) is widely used in optical communication for enabling multiple signals being processed and transferred independently. In this work, we apply WDM to optical logic PIC synthesis to reduce the PIC area.

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12:30End of session
Lunch Break in Lunch Area



Coffee Breaks in the Exhibition Area

On all conference days (Tuesday to Thursday), coffee and tea will be served during the coffee breaks at the below-mentioned times in the exhibition area.

Lunch Breaks (Lunch Area)

On all conference days (Tuesday to Thursday), a seated lunch (lunch buffet) will be offered in the Lunch Area to fully registered conference delegates only. There will be badge control at the entrance to the lunch break area.

Tuesday, March 26, 2019

Wednesday, March 27, 2019

Thursday, March 28, 2019