DATE 2017 Awards Ceremony

2017-03-28

PhD Forum Best Poster Prize supported by EDAA, ACM Sigda and IEEE CEDA

Enabling Caches in Probabilistic Timing Analysis
Leonidas Kosmidis, Barcelona Supercomputing Center, ES

Towards Computer-Aided Design of Quantum Logic
Philipp Niemann, University of Bremen, DE

IEEE Fellow Award

Prof. Todd Austin
University of Michigan
elevated to IEEE Fellow "for contributions to simulation techniques and resilient system design in computer architecture”
Prof. Todd Austin
Prof. Valeria Bertacco
University of Michigan
elevated to IEEE Fellow "for contribution to computer-aided verification and reliable system design”
Prof. Valeria Bertacco
Prof. Cristina Silvano
Politecnico di Milano
elevated to IEEE Fellow “for contributions to energy-efficient computer architectures”
Prof. Cristina Silvano

Prof. Alex Yakovlev
Newcastle University
elevated to IEEE Fellow “for contributions to theory and design of asynchronous circuits”

Prof. Alex Yakovlev

DATE Fellow Award

Dr. Juergen Haase
edacentrum
For long term outstanding contribution to the DATE Exhibition Theatre
Dr. Juergen Haase
Prof. Luca Fanucci
Università di Pisa
For outstanding service contribution as General Chair of DATE 2016
Prof. Luca Fanucci

IEEE CEDA Service Award

Prof. Luca Fanucci
For outstanding service contribution as General Chair of DATE 2016
Prof. Luca Fanucci

IEEE CS TTTC Outstanding Contribution Award

Prof. Luca Fanucci
For outstanding service contribution as General Chair of DATE 2016
Prof. Luca Fanucci

IEEE TTTC Lifetime Contribution Medal

Bernard Courtois
For outstanding technical contribution and fundamental impact on Test Technology
 Bernard Courtois

DATE 2017 Best Paper Awards

Each year the Design, Automation and Test in Europe Conference presents awards to the authors of the best papers. The selection is performed by an award committee, based on the results of the reviewing process and the quality of the final paper.

DATE Best Paper Awards have been given during the DATE Party

D Track

AUTOMATIC PLACE-AND-ROUTE OF EMERGING LED-DRIVEN WIRES WITHIN A MONOLITHICALLY-INTEGRATED CMOS+III-V PROCESS
Tushar Krishna1, Arya Balachandran2, Siau Ben Chiah2, Li Zhang3, Bing Wang3, Cong Wang2, Kenneth Lee Eng Kian3, Jurgen Michel4 and Li-Shiuan Peh5
1Georgia Institute of Technology, US; 2NTU, SG; 3SMART, SG; 4MIT, US; 5Professor, National University of Singapore, SG

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A Track

COSYN: EFFICIENT SINGLE-CELL ANALYSIS USING A HYBRID MICROFLUIDIC PLATFORM
Mohamed Ibrahim1, Krishnendu Chakrabarty1 and Ulf Schlichtmann2
1Duke University, US; 2TU München, DE

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T Track

FAST AND WAVEFORM-ACCURATE HAZARD-AWARE SAT-BASED TSOF ATPG
Jan Burchard1, Dominik Erb1, Adit D. Singh2, Sudhakar M. Reddy3 and Bernd Becker1
1University of Freiburg, DE; 2Auburn University, US; 3University of Iowa, US

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E Track

MODNN: LOCAL DISTRIBUTED MOBILE COMPUTING SYSTEM FOR DEEP NEURAL NETWORK
Jiachen Mao1, Xiang Chen2, Kent W. Nixon1, Christopher Krieger3 and Yiran Chen1
1University of Pittsburgh, US; 2George Mason University, US; 3University of Maryland, Baltimore County, US

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DATE 2017 Best IP Award

DATE Best IP Award has been given during the DATE Party

EVOAPPROX8B: LIBRARY OF APPROXIMATE ADDERS AND MULTIPLIERS FOR CIRCUIT DESIGN AND BENCHMARKING OF APPROXIMATION METHODS (Paper/SoftConf ID: 241)
Vojtech Mrazek, Radek Hrbacek, Zdenek Vasicek and Lukas Sekanina, Brno University of Technology, CZ