DATE - Design, Automation and Test in Europe

Fraunhofer IIS, Institutsteil EAS

Fraunhofer IIS, Institutsteil EAS (Booth: 17)

Contact: Dr. Manfred Dietrich


Zeunerstr. 38
01069 Dresden
Germany

Tel: 49 351 4640 715
Fax: 49 351 4640 703


E-Mail: manfred.dietrich@eas.iis.fraunhofer.de
Website: http://www.eas.iis.fraunhofer.de

We perform R&D activities aimed at computer-aided design (CAD) of electronic and heterogeneous systems. The focus is on methods and tools for modelling, simulation, syn-
thesis, optimisation, verifica-
tion and test.
Furthermore we develop prototypes of innovative hardware software systems mainly targeted at Tele-
communications and Digital Broadcasting.




ASIC and SOC Design:
Design Entry
Behavioural Modelling & Simulation
Synthesis
Power & Optimisation
Physical Analysis (Timing, Themal, Signal)
Verification
Analogue and Mixed-Signal Design
MEMS Design
RF Design

System-Level Design:
Behavioural Modelling & Analysis
Acceleration & Emulation
Hardware/Software Co-Design
Package Design
PCB & MCM Design

Test:
Design for Test
Design for Manufacture and Yield
Logic Analysis
Test Automation (ATPG, BIST)
Silicon Validation
Mixed-Signal Test

Services:
Design Consultancy
Prototyping
IP e-commerce & Exchange
Training

Embedded Software Development:
Debuggers
Software/Modelling

Hardware:
FPGA & Reconfigurable Platforms
Development Boards
Workstations & IT Infrastructure

Semiconductor IP:
Analogue & Mixed Signal IP
Configurable Logic IP
Embedded FPGA
Embedded Software IP
On-Chip Bus Interconnect
On-Chip Debug
Physical Libraries
Synthesizable Libraries
Test IP
Verification IO

Application-Specific IP:
Analogue & Mixed Signal IP
Data Communication
Digital Signal Processing
Security
Telecommunication
Wireless Communication