DATE - Design, Automation and Test in Europe

HiPEAC NoE

HiPEAC NoE (Booth: EP16)

Contact: Koen De Bosschere


Universiteit GENT - ELIS,
Sint-Pietersnieuwstraat 41,
9000 GENT, BELGIUM

Tel: +32 9 264 42 58
Fax: +32 9 264 35 94


E-Mail: Koen.DeBosschere@elis.ugent.be
Website: www.HiPEAC.net

HiPEAC is a Network of Excellence on High Performance and Embedded Architecture and Compilation. It gathers over 150 leading European academic and industrial computing-system researchers in one virtual center of excellence with the aim of coordinating their research, improving their mobility and collaborations, increasing their visibility. The network consists of nine research clusters that look into on-chip multi-cores technology and customisation, leading to heterogeneous multi-core systems. HiPEAC organizes several large networking events in Europe: the ACACES Summer school, Computing Systems Weeks (those are co-located with industrial workshops), the HiPEAC conference. Additionally HiPEAC journals, newsletters and roadmaps are published on the regular basis.




ASIC and SOC Design:
Behavioural Modelling & Simulation
Power & Optimisation
Physical Analysis (Timing, Themal, Signal)
Verification

System-Level Design:
Behavioural Modelling & Analysis
Physical Analysis
Acceleration & Emulation
Hardware/Software Co-Design

Test:
Test Automation (ATPG, BIST)

Services:
Data Management and Collaboration

Embedded Software Development:
Compilers
Real Time Operating Systems
Debuggers
Software/Modelling

Hardware:
FPGA & Reconfigurable Platforms

Semiconductor IP:
Embedded FPGA
Embedded Software IP
On-Chip Bus Interconnect

Application-Specific IP:
Digital Signal Processing
Multimedia Graphics
Networking
Telecommunication
Wireless Communication