DATE 2009

D8 Formal Methods and Verification

Chair Jason Baumgartner
  IBM Corporation, Austin, TX, USA
jason.r.baumgartner@gmail.com
 
Co-Chair Joao Marques-Silva
  University of Southampton, UK
jpms@ecs.soton.ac.uk
 

Formal verification and specification techniques (including equivalence checking, model checking, symbolic simulation, theorem-proving, abstraction and refinement techniques, and real time verification); Technologies supporting formal verification (including SMT, SAT, BDD, ATPG, and related work); Semi-formal verification techniques; Applications and case studies; Formal verification of IPs, SoCs, cores and real-time/embedded systems; Verification in practice, namely the integration of verification into the design flow.