ANDRES (Booth: EP7)

Contact: Dr. Frank Oppenheimer

OFFIS
Escherweg 2
26121 Oldenburg
Germany

Tel: +49 441 9722285
Fax: +49 441 9722278

E-Mail: andres-web@offis.de
Website: ANDRES

Goal of the ANDRES project is to improve the efficiency of heterogeneous embedded system design encouraging the use of novel run-time reconfigurable platforms. In ANDRES we have developed a SystemC based modelling framework integrating three domain-specific modelling libraries to enable seamless system-level specification and simulation of software, reconfigurable hardware and analog/mixed-signal components. The framework is accompanied by the high-level synthesis tool FOSSY providing automatic implementation of adaptive systems on run-time reconfigurable FPGAs. The framework is based upon the formal semantics of ForSyDe enabling early analysis and exploration of performance characteristics. At DATE a full demonstration of the flow will be shown. ANDRES is a Specific Targeted Research Project co-founded by the European Commission within the Sixth Framework Programme. Partners are OFFIS, Vienna University of Technology, KTH, University of Cantabria, DS2 and Thales Communication.

ASIC and SOC Design:
Design Entry
Behavioural Modelling & Simulation
Synthesis
Verification
Analogue and Mixed-Signal Design

System-Level Design:
Behavioural Modelling & Analysis
Hardware/Software Co-Design

Embedded Software Development:
Software/Modelling

Hardware:
FPGA & Reconfigurable Platforms