ET 22 Exhibition Theatre: Wednesday, 22nd April 2009
| Conference Panel Session & Hot Topic 6.8 – ‘Formal Approaches to Analog Verification - Now or Never?’ | |
| PANEL SESSION: Embedded Multicore - A New Frontier? Moderator: Gary Smith, Principle, Gary Smith EDA Panellists: Pierre Paulin, Director SoC Platform Automation, ST; Max Domeika, Senior Staff Software Engineer, Intel; John Goodacre, Program Manager, ARM; David Stewart, CEO, CriticalBlue; Grant Martin, Chief Scientist, Tensilica |
Overview:
Multicore processors have been widely touted as the enabler of next generation system performance. They have become pervasive throughout a range of desktop applications, regardless of the programmability issues inherent in their use. However, mainstream multicore processors are now emerging for use in embedded SoCs, an environment with far greater performance requirements and design constraints. Programming this new breed of processor will surely require updated ecosystems and engineering processes.
What will it take to drive the adoption, use, and success of these new embedded multicore processors that are pushing the boundaries of high-performance design? Will they be the catalyst that challenges both business and technology development? What new ways of thinking will be required? This panel will discuss the new technologies and methodologies required to address a new multicore frontier.
| Conference Panel Session & Hot Topic 7.8 – ‘Timing Specification & Analysis in Automotive Systems’ | |
| PANEL SESSION: Fabless semiconductor design at 65nm and beyond Moderator: Chris Edwards, Editor, Engineering & Technology Panellists: Mr. Rainer Kaese, Senior Manager - SoC Solution, Toshiba; Mr. Jose Calero, CTO, DS2; Fernando Barbero, Director of SOC Development, SIDSA; Mr. Trevor Robinson, CTO, Desix Technology |
Overview:
Europe’s fabless semiconductor companies are playing an increasingly important role in the creation of technologies for multimedia and communications applications including digital and mobile TV and home networking. However, with tight time-to-market windows and significant pressures on budgets and resources these companies must carefully consider the model they choose to move their products from design, through prototyping and on into final production.
This panel will look at the process technologies available to chip designers targeting these markets and the differences between a traditional foundry model and an ASIC-orientated approach. The panel will consider critical issues for future designs including technology cost, skills and risk of failure, and will look at system flow requirements in areas such as EDA, IP and external design support. Factors influencing turn-around-time (TAT) for prototype validation and volume production will also be discussed.
Room: Risso 8 Level 2 |
Conference: 8.8 INVITED INDUSTRIAL SESSION – Industrial System Designs in Multimedia and Communication |
|
Workshop: Sophia Antipolis & the economic crisis
Welcome address: Introduction and discussion leadership : Speakers: |
Overview:
In front of the downturn which is hitting the worldwide Information and Communication Technologies (ICT) industry with its stream of restructuring and layoffs, what are the assets of the Sophia Antipolis area to better resist than other technology parks?
The Riviera ICT cluster has indeed strong specific features which will limit the effects of the recession, and notably the presence in the same place, and within the same economic community, of all the links of the value chain, from components design to usage.
As an example, while Texas Instruments was disengaging from some of its mobile phone activities, INTEL announced the opening of a new design center in wireless technologies, reporting into its Ultra Mobility Group which is developing very low-consumption components for mobile PCs (UMPCs and MIDs). The new unit’s mission will be to design RF subsystems for communicating mobile objects.
The Sophia Antipolis MicroElectronics (SAME) association, which brings together the major players of the microelectronics industry in the Sophia Antipolis area around various projects such as SAME forum, « Promotion of Engineer careers » or the dedicated support to local start-ups, is a major contributor to the dynamysm of this sector in the region.
The public institutions, in close cooperation with education and research organisations and with corporations, are supporting the development of the microelectronics industry in the area through several actions such as the creation of the ARCSIS CIM PACA Design platform, a very efficient tool for designing innovative components and supporting small and medium companies as well as start-ups. The platform is also currently working with the local economic development agency, Team Côte d’Azur, to create a state-of-the-art business incubator.
During this session, various actors of the Sophia Antipolis success story, including the competitiveness cluster « Secured Communicating Solutions », will explain how they are involved in the development of the ITCs in the technopole and how they can support the establishment of new companies in the business park whether they are start-ups or local antennas of existing companies. Also the representative of a recently created start-up which benefited from this support will give a testimony.
After the various presentations and the answers to the questions from the audience a cocktail will be offered to the participants by Team Côte d’Azur, the Riviera’s development agency.
