Interactive Presentations (in Exhibition Hall Rhodes, Level 2): 1000 - 1030 IP2 / 1600 - 1630 IP3
Exhibition Break: 1000 - 1100
For Exhibition Theatre Details please click here.
Breaks: 1230 - 1430 (Lunch) / 1600 - 1700
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Track
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Room
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0830 - 1000
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1100 - 1230
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1340 - 1430
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1430 - 1600
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1700 - 1830
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1
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Hermes, Level 2
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5.1 HOT TOPIC – Concurrent SoC Development and End-to-End Planning (SoC Development Strategies Special Day)
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6.1.1 PANEL SESSION – Vertical Integration Versus Disaggregation (SoC Development Strategies Special Day)
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6.1.2 LUNCH-TIME KEYNOTE AND AWARDS (SoC Development Strategies Special Day)
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7.1 PANEL SESSION - ESL Methodology for SoC (SoC Development Strategies Special Day)
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8.1 PANEL SESSION – Architectures and Integration for Programmable SoC’s (SoC Development Strategies Special Day)
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2
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Clio, Level 3
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5.2 HOT TOPIC – The Nano-Electronics Challenge – Chip Designers Meet Real Nano-Electronics in 2010s?
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6.2 Emerging Hardware: 3D Integration and CNTFET
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7.2 HOT TOPIC – The Impact of Non-Volatile Memory on Architecture Design and Tools
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8.2 Advanced Low-Power Memory
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3
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Gallieni 3,
Level 2
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5.3 Embedded Systems Security
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6.3 Design and Security Evaluation of Cryptographic Functions
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7.3 On-Chip Communication for Multi-Core Platforms
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8.3 Applications and Thermal Management for Multi-Core Platforms
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4
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Thalie, Level 3
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5.4 Architectural Exploration for MPSoCs
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6.4 Runtime Checking and Optimisation
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7.4 Non-Functional Properties of MPSoCs
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8.4 Design Methods for Reconfigurable Systems
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5
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Erato, Level 3
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5.5 On-Line Testing and Fault Tolerance
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6.5 EMBEDDED TUTORIAL – Contactless Testing: Possibility or Pipe-Dream?
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7.5 Test Development and On-Line Error Detection
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8.5 Debug and Diagnosis
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6
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Uranie, Level 3
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5.6 Performance Analysis Support for the Design of Embedded Real-Time Systems
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6.6 Fault Tolerance and Energy Issues in Multiprocessor Real-Time Systems
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7.6 Software Support for MPSoC and Multi-Core Systems
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8.6 Embedded Application Development and Verification
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7
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Gallieni AB, Level 2
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5.7 Novel Computing and Simulation Approaches
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6.7 Analogue Synthesis and Optimisation
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7.7 Sizing, Placement, Planning and Packaging
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8.7 HOT TOPIC – Health-Care Electronics: The Market, The Challenges, The Progress
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| 8 |
Exhibition Theatre, Level 2 |
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6.8 HOT TOPIC – Formal Approaches to Analogue Verification – Now or Never? |
7.8 HOT TOPIC – Timing Specification and Analysis in Automotive Systems
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8.8 INVITED INDUSTRIAL SESSION – Industrial System Designs in Multimedia and Communication
Risso 8, Level 2
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