The impact of process uncertainties on high-speed mixed-signal/RF circuits arising from technology scaling must be taken into account during circuit design and manufacturing test.  This tutorial develops advanced mixed-signal/RF test techniques that allow complex specifications to be evaluated at low cost.  Low test cost is achieved through the use of low cost (low speed) external test instrumentation, the use of “intelligent” tester load boards and the use of on-chip circuitry to facilitate built-in test (BIT).  The feasibility of completely autonomous built-in self-test is discussed and design tradeoffs are presented.  The tradeoffs involved in using conventional specification test methods vs. advanced alternative test techniques based on test learning are analysed.  It is shown how such advanced built-in self-test (BIST) techniques can be used to perform post-manufacture self-tuning of mixed-signal/high-speed/RF circuits for the purpose of achieving high yield under large manufacturing process variations.  Performance/power constrained self-tuning techniques are discussed and it is shown how tuning can be performed for complex specifications (such as EVM) for which conventional built-in test driven tuning is impractical from tuning time considerations.

The intended audience includes mixed-signal/RF design and test engineers, test practitioners and managers, students and academics.

This tutorial is part of the IEEE Computer Society TTTC Test Technology Educational Program (TTEP) 2009