4.7 Novel Design Space Exploration and Power Optimisation Techniques
Date:
Tue, 2009-04-21Time:
17:00 - 18:30Location / Room:
Gallieni AB, Level 2 Moderators:
M Poncino, Politecnico di Torino, IT
J Haid, Infineon Technologies, AT
This session presents three novel approaches for the exploration for the power performance trade-off for single and multi-core systems. The first paper presents a multi-processor task scheduling approach that exploits input-dependent variations in the execution time of tasks. The second paper introduces a novel DVFS algorithm based on a runtime distribution-aware prediction of the workload. The last paper finally presents an accurate design space exploration tool for NoC architectures.
| 1700 | ENERGY EFFICIENT MULTIPROCESSOR TASK SCHEDULING UNDER INPUT-DEPENDENT VARIATION J Cong and K Gururaj, UCLA, US |
| 1730 | PROGRAM PHASE AND RUNTIME DISTRIBUTION-AWARE ONLINE DVFS FOR COMBINED VDD/VBB SCALING J Kim and C-M Kyung, KAIST, KR S Yoo, POSTECH, KR |
| 1800 | ORION 2.0: A FAST AND ACCURATE NOC POWER AND AREA MODEL FOR EARLY-STAGE DESIGN SPACE EXPLORATION A B Kahng and K Samadi, UC San Diego, US B Li and L-S Peh, Princeton U, US |
