3.7 NoC Customisation Techniques
Date:
Tue, 2009-04-21Time:
14:30 - 16:00Location / Room:
Gallieni AB, Level 2Moderators:
T Basten, Twente U, NL
S Yoo, POSTECH (Pohang U of Science and Technology), KR
Papers in this session describe design and run-time configuration techniques for Networks on Chip. The first paper proposes a design technology for composable communication services. The next two papers deal with run-time configurable links and routing attributes. The last paper describes a parametric communication architecture for FPGA- based systems.
| 1430 | AELITE: A FLIT-SYNCHRONOUS NETWORK ON CHIP WITH COMPOSABLE AND PREDICTABLE SERVICES A Hansson, TU Eindhoven, NL M Subburaman, Linkoping Institute of Technology, SE K Goossens, NXP Semiconductors and TU Delft, NL |
| 1500 | CONFIGURABLE LINKS FOR RUNTIME ADAPTIVE ON-CHIP COMMUNICATION M A Al Faruque, T Ebi and J Henkel, Karlsruhe U, Chair For Embedded Systems, DE |
| 1530 (S) | SYNTHESIS OF LOW-OVERHEAD CONFIGURABLE SOURCE ROUTING TABLES NETWORK-ON-CHIP INTERFACES I Loi and L Benini, DEIS – Bologna U, IT |
| 1545 (S) | SCORES: A SCALABLE AND PARAMETRIC STREAMS-BASED COMMUNICATION ARCHITECTURE FOR MODULAR RECONFIGURABLE SYSTEMS A Jara-Berrocal and A Gordon-Ross, Florida U, US |
