2.1 EXECUTIVE SESSION – FPGA Developments: What is New?
Organisers:
Bob Gardner, EDA Consortium, US
Antun Domic, Synopsys, US
Moderator:
Gary Meyers, VP and General Manager, Synplicity Business Group, Synopsys, US
Executives:
Simon Bloch, VP and General Manager, Mentor Graphics, US
Frederic Reblewski, Chief Exedutive Officer, Abound Logic, FR
Jean Louis Brelet, Senior Manager, Product Definition, Xilinx, FR
Mark Dickenson, VP of European Technology Centre, Altera, UK
Patrick Geuriaud, Validation and Prototyping Group Leader, ST-Ericsson, FR
This panel will survey what is happening with FPGAs. What will be the impact of the new crop of 40nm devices that are expected to roll out in 2009? How successful have FPGA vendors been in their efforts to reduce power and cost for higher volume markets? Can we expect new FPGA vendors to come into the market and how can they gain share against incumbent providers? How are FPGAs being used in prototyping solutions to accelerate ASIC verification and embedded software development? This panel will present views on what is new here and what can we expect in the near future.
