DATE - Design, Automation and Test in Europe

12.1 PANEL SESSION – Programming MPSoC Platforms: Roadworks Ahead! (Multicore Applications Special Day)

Date: 
Thu, 2009-04-23
Time: 
16:00 - 17:30
Location / Room: 
Hermes, Level 2

Organiser:
R Leupers, RWTH Aachen U, DE

Moderator:
M de Lange, ACE, NL

The trend towards MPSoC platforms in most computing domains does not only mean a radical change in computer architecture. Even more important, the classical sequential von Neumann programming model needs to be overcome.  Efficient use of the MPSoC HW resources demands for radically new models and corresponding SW development tools, capable of exploiting the available parallelism and guaranteeing bug-free parallel SW.  While several standards are established in the HPC domain, it is clear that more innovations are required for successful deployment of heterogeneous embedded MPSoC.  On the other hand, the freedom for disruptive programming technologies is limited by the huge amount of certified sequential code that demands for a more pragmatic, gradual tool and code replacement strategy.  The goal of this session is to consolidate today´s different MPSoC programming approaches, and to provide focus for future R&D activities.

1600 FORGET ABOUT MULTI-CORE – WHAT ABOUT MANY-CORE CHIPS?
A Vajda, Ericsson, SE
  TIME-TRIGGERED VERSUS EVENT-TRIGGERED REAL-TIME MULTIPROCESSOR SYSTEMS AND
THE IMPLICATIONS FOR THE APPLICATION SOFTWARE
M Bekooij, NXP Semiconductors, NL
  AUTOMATED PARTITIONING OF SEQUENTIAL LEGACY CODE
R Leupers, RWTH Aachen U, DE
  PLATFORM-BASED EMBEDDED SW DESIGN FOR MULTIPROCESSOR EMBEDDED SYSTEMS
S Ha, Seoul National U, KR
  DESIGNER-CONTROLLED RECODING FOR MULTI-CORE PARALLIZATION
R Doemer, UC Irvine, US
  MPSoC SW DEBUGGING WITH VIRTUAL PLATFORMS
A Nohl, CoWare, DE